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ppc patch queue 2017-09-15 

Here's the current batch of accumulated ppc patches.  These are all
 pretty simple bugfixes or cleanups, no big new features here.
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20170915' into staging

ppc patch queue 2017-09-15

Here's the current batch of accumulated ppc patches.  These are all
pretty simple bugfixes or cleanups, no big new features here.

# gpg: Signature made Fri 15 Sep 2017 04:50:00 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20170915:
  ppc/kvm: use kvm_vm_check_extension() in kvmppc_is_pr()
  spapr_events: use QTAILQ_FOREACH_SAFE() in spapr_clear_pending_events()
  spapr_cpu_core: cleaning up qdev_get_machine() calls
  spapr_pci: don't create 64-bit MMIO window if we don't need to
  spapr_pci: convert sprintf() to g_strdup_printf()
  spapr_cpu_core: fail gracefully with non-pseries machine types
  xics: fix several error leaks
  vfio, spapr: Fix levels calculation
  spapr_pci: handle FDT creation errors with _FDT()
  spapr_pci: use the common _FDT() helper
  spapr: fix CAS-generated reset
  ppc/xive: fix OV5_XIVE_EXPLOIT bits
  spapr: only update SDR1 once per-cpu during CAS
  spapr_pci: use g_strdup_printf()
  spapr_pci: drop useless check in spapr_populate_pci_child_dt()
  spapr_pci: drop useless check in spapr_phb_vfio_get_loc_code()
  hw/ppc/spapr.c: cleaning up qdev_get_machine() calls
  net: Add SunGEM device emulation as found on Apple UniNorth

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-09-15 19:00:16 +01:00
parent d28e29a925 70a0c19e83
commit d535f5d363
15 changed files with 1580 additions and 98 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
default-configs/ppc-softmmu.mak
View File

@ -18,6 +18,7 @@ CONFIG_PREP_PCI=y
CONFIG_I82378=y
CONFIG_PC87312=y
CONFIG_MACIO=y
CONFIG_SUNGEM=y
CONFIG_PCSPK=y
CONFIG_CS4231A=y
CONFIG_CUDA=y

12
hw/intc/xics.c
View File

@ -306,8 +306,8 @@ static void icp_realize(DeviceState *dev, Error **errp)
obj = object_property_get_link(OBJECT(dev), ICP_PROP_XICS, &err);
if (!obj) {
error_setg(errp, "%s: required link '" ICP_PROP_XICS "' not found: %s",
__func__, error_get_pretty(err));
error_propagate(errp, err);
error_prepend(errp, "required link '" ICP_PROP_XICS "' not found: ");
return;
}
@ -315,8 +315,8 @@ static void icp_realize(DeviceState *dev, Error **errp)
obj = object_property_get_link(OBJECT(dev), ICP_PROP_CPU, &err);
if (!obj) {
error_setg(errp, "%s: required link '" ICP_PROP_CPU "' not found: %s",
__func__, error_get_pretty(err));
error_propagate(errp, err);
error_prepend(errp, "required link '" ICP_PROP_CPU "' not found: ");
return;
}
@ -641,8 +641,8 @@ static void ics_base_realize(DeviceState *dev, Error **errp)
obj = object_property_get_link(OBJECT(dev), ICS_PROP_XICS, &err);
if (!obj) {
error_setg(errp, "%s: required link '" ICS_PROP_XICS "' not found: %s",
__func__, error_get_pretty(err));
error_propagate(errp, err);
error_prepend(errp, "required link '" ICS_PROP_XICS "' not found: ");
return;
}
ics->xics = XICS_FABRIC(obj);

1
hw/net/Makefile.objs
View File

@ -27,6 +27,7 @@ common-obj-$(CONFIG_CADENCE) += cadence_gem.o
common-obj-$(CONFIG_STELLARIS_ENET) += stellaris_enet.o
common-obj-$(CONFIG_LANCE) += lance.o
common-obj-$(CONFIG_FTGMAC100) += ftgmac100.o
common-obj-$(CONFIG_SUNGEM) += sungem.o
obj-$(CONFIG_ETRAXFS) += etraxfs_eth.o
obj-$(CONFIG_COLDFIRE) += mcf_fec.o

1447
hw/net/sungem.c Normal file
View File

File diff suppressed because it is too large Load Diff

44
hw/net/trace-events
View File

@ -278,3 +278,47 @@ spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) "H_SEND_LOG
spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) "rxbufs = %"PRIu32
spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) " buf desc: 0x%"PRIx64
spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) "%d buffers, total length 0x%x"
# hw/net/sungem.c
sungem_tx_checksum(uint16_t start, uint16_t off) "TX checksumming from byte %d, inserting at %d"
sungem_tx_checksum_oob(void) "TX checksum out of packet bounds"
sungem_tx_unfinished(void) "TX packet started without finishing the previous one"
sungem_tx_overflow(void) "TX packet queue overflow"
sungem_tx_finished(uint32_t size) "TX completing %"PRIu32 " bytes packet"
sungem_tx_kick(void) "TX Kick..."
sungem_tx_disabled(void) "TX not enabled"
sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) "TX processing comp=%"PRIu32", kick=%"PRIu32" out of %"PRIu32
sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) "TX desc %"PRIu32 ": 0x%"PRIx64" 0x%"PRIx64
sungem_tx_reset(void) "TX reset"
sungem_rx_mac_disabled(void) "Check RX MAC disabled"
sungem_rx_txdma_disabled(void) "Check RX TXDMA disabled"
sungem_rx_check(bool full, uint32_t kick, uint32_t done) "Check RX %d (kick=%"PRIu32", done=%"PRIu32")"
sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) "Word MAC: 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32
sungem_rx_mac_multicast(void) "Multicast"
sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) "Compare MAC to 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32".."
sungem_rx_packet(size_t size) "RX got %zu bytes packet"
sungem_rx_disabled(void) "RX not enabled"
sungem_rx_bad_frame_size(size_t size) "RX bad frame size %zu, dropped"
sungem_rx_unmatched(void) "No match, dropped"
sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) "RX processing done=%"PRIu32", kick=%"PRIu32" out of %"PRIu32
sungem_rx_ringfull(void) "RX ring full"
sungem_rx_desc(uint64_t control, uint64_t buffer) "RX desc: 0x%"PRIx64" 0x%"PRIx64
sungem_rx_reset(void) "RX reset"
sungem_rx_kick(uint64_t val) "RXDMA_KICK written to %"PRIu64
sungem_reset(bool pci_reset) "Full reset (PCI:%d)"
sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) "MII write addr 0x%x reg 0x%02x val 0x%04x"
sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) "MII read addr 0x%x reg 0x%02x val 0x%04x"
sungem_mii_invalid_sof(uint32_t val) "MII op, invalid SOF field 0x%"PRIx32
sungem_mii_invalid_op(uint8_t op) "MII op, invalid op field 0x%x"
sungem_mmio_greg_write(uint64_t addr, uint64_t val) "MMIO greg write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_greg_read(uint64_t addr, uint64_t val) "MMIO greg read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_txdma_write(uint64_t addr, uint64_t val) "MMIO txdma write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_txdma_read(uint64_t addr, uint64_t val) "MMIO txdma read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) "MMIO rxdma write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) "MMIO rxdma read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_mac_write(uint64_t addr, uint64_t val) "MMIO mac write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_mac_read(uint64_t addr, uint64_t val) "MMIO mac read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_mif_write(uint64_t addr, uint64_t val) "MMIO mif write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_mif_read(uint64_t addr, uint64_t val) "MMIO mif read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64

2
hw/pci/pci.c
View File

@ -1821,6 +1821,7 @@ static const char * const pci_nic_models[] = {
"e1000",
"pcnet",
"virtio",
"sungem",
NULL
};
@ -1833,6 +1834,7 @@ static const char * const pci_nic_names[] = {
"e1000",
"pcnet",
"virtio-net-pci",
"sungem",
NULL
};

21
hw/ppc/spapr.c
View File

@ -391,10 +391,8 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
return ret;
}
static hwaddr spapr_node0_size(void)
static hwaddr spapr_node0_size(MachineState *machine)
{
MachineState *machine = MACHINE(qdev_get_machine());
if (nb_numa_nodes) {
int i;
for (i = 0; i < nb_numa_nodes; ++i) {
@ -939,7 +937,7 @@ static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);
char val[2 * 4] = {
23, 0x00, /* Xive mode: 0 = legacy (as in ISA 2.7), 1 = Exploitation */
23, 0x00, /* Xive mode, filled in below. */
24, 0x00, /* Hash/Radix, filled in below. */
25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
26, 0x40, /* Radix options: GTSE == yes. */
@ -1052,7 +1050,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr,
hwaddr rtas_addr,
hwaddr rtas_size)
{
MachineState *machine = MACHINE(qdev_get_machine());
MachineState *machine = MACHINE(spapr);
MachineClass *mc = MACHINE_GET_CLASS(machine);
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
int ret;
@ -1372,7 +1370,7 @@ void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr)
spapr_reallocate_hpt(spapr, hpt_shift, &error_fatal);
if (spapr->vrma_adjust) {
spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
spapr->rma_size = kvmppc_rma_size(spapr_node0_size(MACHINE(spapr)),
spapr->htab_shift);
}
/* We're setting up a hash table, so that means we're not radix */
@ -2033,7 +2031,7 @@ static SaveVMHandlers savevm_htab_handlers = {
static void spapr_boot_set(void *opaque, const char *boot_device,
Error **errp)
{
MachineState *machine = MACHINE(qdev_get_machine());
MachineState *machine = MACHINE(opaque);
machine->boot_order = g_strdup(boot_device);
}
@ -2235,7 +2233,7 @@ static void ppc_spapr_init(MachineState *machine)
MemoryRegion *rma_region;
void *rma = NULL;
hwaddr rma_alloc_size;
hwaddr node0_size = spapr_node0_size();
hwaddr node0_size = spapr_node0_size(machine);
long load_limit, fw_size;
char *filename;
Error *resize_hpt_err = NULL;
@ -3298,7 +3296,8 @@ out:
static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
MachineState *ms = MACHINE(hotplug_dev);
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(ms);
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
int node;
@ -3347,8 +3346,8 @@ static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
sPAPRMachineState *sms = SPAPR_MACHINE(OBJECT(hotplug_dev));
MachineClass *mc = MACHINE_GET_CLASS(sms);
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {

11
hw/ppc/spapr_cpu_core.c
View File

@ -174,10 +174,10 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
g_free(sc->threads);
}
static void spapr_cpu_core_realize_child(Object *child, Error **errp)
static void spapr_cpu_core_realize_child(Object *child,
sPAPRMachineState *spapr, Error **errp)
{
Error *local_err = NULL;
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
CPUState *cs = CPU(child);
PowerPCCPU *cpu = POWERPC_CPU(cs);
Object *obj;
@ -213,7 +213,7 @@ error:
static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
sPAPRMachineState *spapr;
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
CPUCore *cc = CPU_CORE(OBJECT(dev));
@ -223,7 +223,8 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
void *obj;
int i, j;
if (!object_dynamic_cast(qdev_get_machine(), TYPE_SPAPR_MACHINE)) {
spapr = (sPAPRMachineState *) qdev_get_machine();
if (!object_dynamic_cast((Object *) spapr, TYPE_SPAPR_MACHINE)) {
error_setg(errp, "spapr-cpu-core needs a pseries machine");
return;
}
@ -265,7 +266,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
for (j = 0; j < cc->nr_threads; j++) {
obj = sc->threads + j * size;
spapr_cpu_core_realize_child(obj, &local_err);
spapr_cpu_core_realize_child(obj, spapr, &local_err);
if (local_err) {
goto err;
}

4
hw/ppc/spapr_events.c
View File

@ -702,9 +702,9 @@ static void event_scan(PowerPCCPU *cpu, sPAPRMachineState *spapr,
void spapr_clear_pending_events(sPAPRMachineState *spapr)
{
sPAPREventLogEntry *entry = NULL;
sPAPREventLogEntry *entry = NULL, *next_entry;
QTAILQ_FOREACH(entry, &spapr->pending_events, next) {
QTAILQ_FOREACH_SAFE(entry, &spapr->pending_events, next, next_entry) {
QTAILQ_REMOVE(&spapr->pending_events, entry, next);
g_free(entry->extended_log);
g_free(entry);

21
hw/ppc/spapr_hcall.c
View File

@ -1559,20 +1559,16 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
}
if (spapr->htab_shift < maxshift) {
CPUState *cs;
/* Guest doesn't know about HPT resizing, so we
* pre-emptively resize for the maximum permitted RAM. At
* the point this is called, nothing should have been
* entered into the existing HPT */
spapr_reallocate_hpt(spapr, maxshift, &error_fatal);
CPU_FOREACH(cs) {
if (kvm_enabled()) {
/* For KVM PR, update the HPT pointer */
target_ulong sdr1 = (target_ulong)(uintptr_t)spapr->htab
| (spapr->htab_shift - 18);
kvmppc_update_sdr1(sdr1);
}
if (kvm_enabled()) {
/* For KVM PR, update the HPT pointer */
target_ulong sdr1 = (target_ulong)(uintptr_t)spapr->htab
| (spapr->htab_shift - 18);
kvmppc_update_sdr1(sdr1);
}
}
}
@ -1585,6 +1581,13 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
* to worry about this for now.
*/
ov5_cas_old = spapr_ovec_clone(spapr->ov5_cas);
/* also clear the radix/hash bit from the current ov5_cas bits to
* be in sync with the newly ov5 bits. Else the radix bit will be
* seen as being removed and this will generate a reset loop
*/
spapr_ovec_clear(ov5_cas_old, OV5_MMU_RADIX_300);
/* full range of negotiated ov5 capabilities */
spapr_ovec_intersect(spapr->ov5_cas, spapr->ov5, ov5_guest);
spapr_ovec_cleanup(ov5_guest);

106
hw/ppc/spapr_pci.c
View File

@ -40,7 +40,7 @@
#include "trace.h"
#include "qemu/error-report.h"
#include "qapi/qmp/qerror.h"
#include "hw/ppc/fdt.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_ids.h"
@ -61,16 +61,6 @@
#define RTAS_TYPE_MSI 1
#define RTAS_TYPE_MSIX 2
#define FDT_NAME_MAX 128
#define _FDT(exp) \
do { \
int ret = (exp); \
if (ret < 0) { \
return ret; \
} \
} while (0)
sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid)
{
sPAPRPHBState *sphb;
@ -766,7 +756,7 @@ static char *spapr_phb_vfio_get_loc_code(sPAPRPHBState *sphb, PCIDevice *pdev)
/* Construct the path of the file that will give us the DT location */
path = g_strdup_printf("/sys/bus/pci/devices/%s/devspec", host);
g_free(host);
if (!path || !g_file_get_contents(path, &buf, NULL, NULL)) {
if (!g_file_get_contents(path, &buf, NULL, NULL)) {
goto err_out;
}
g_free(path);
@ -774,7 +764,7 @@ static char *spapr_phb_vfio_get_loc_code(sPAPRPHBState *sphb, PCIDevice *pdev)
/* Construct and read from host device tree the loc-code */
path = g_strdup_printf("/proc/device-tree%s/ibm,loc-code", buf);
g_free(buf);
if (!path || !g_file_get_contents(path, &buf, NULL, NULL)) {
if (!g_file_get_contents(path, &buf, NULL, NULL)) {
goto err_out;
}
return buf;
@ -1194,7 +1184,7 @@ static const char *pci_find_device_name(uint8_t class, uint8_t subclass,
return name;
}
static void pci_get_node_name(char *nodename, int len, PCIDevice *dev)
static gchar *pci_get_node_name(PCIDevice *dev)
{
int slot = PCI_SLOT(dev->devfn);
int func = PCI_FUNC(dev->devfn);
@ -1205,21 +1195,21 @@ static void pci_get_node_name(char *nodename, int len, PCIDevice *dev)
ccode & 0xff);
if (func != 0) {
snprintf(nodename, len, "%s@%x,%x", name, slot, func);
return g_strdup_printf("%s@%x,%x", name, slot, func);
} else {
snprintf(nodename, len, "%s@%x", name, slot);
return g_strdup_printf("%s@%x", name, slot);
}
}
static uint32_t spapr_phb_get_pci_drc_index(sPAPRPHBState *phb,
PCIDevice *pdev);
static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
static void spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
sPAPRPHBState *sphb)
{
ResourceProps rp;
bool is_bridge = false;
int pci_status, err;
int pci_status;
char *buf = NULL;
uint32_t drc_index = spapr_phb_get_pci_drc_index(sphb, dev);
uint32_t ccode = pci_default_read_config(dev, PCI_CLASS_PROG, 3);
@ -1282,17 +1272,10 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
pci_find_device_name((ccode >> 16) & 0xff,
(ccode >> 8) & 0xff,
ccode & 0xff)));
buf = spapr_phb_get_loc_code(sphb, dev);
if (!buf) {
error_report("Failed setting the ibm,loc-code");
return -1;
}
err = fdt_setprop_string(fdt, offset, "ibm,loc-code", buf);
buf = spapr_phb_get_loc_code(sphb, dev);
_FDT(fdt_setprop_string(fdt, offset, "ibm,loc-code", buf));
g_free(buf);
if (err < 0) {
return err;
}
if (drc_index) {
_FDT(fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index));
@ -1320,25 +1303,21 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
if (sphb->pcie_ecs && pci_is_express(dev)) {
_FDT(fdt_setprop_cell(fdt, offset, "ibm,pci-config-space-type", 0x1));
}
return 0;
}
/* create OF node for pci device and required OF DT properties */
static int spapr_create_pci_child_dt(sPAPRPHBState *phb, PCIDevice *dev,
void *fdt, int node_offset)
{
int offset, ret;
char nodename[FDT_NAME_MAX];
int offset;
gchar *nodename;
pci_get_node_name(nodename, FDT_NAME_MAX, dev);
offset = fdt_add_subnode(fdt, node_offset, nodename);
ret = spapr_populate_pci_child_dt(dev, fdt, offset, phb);
nodename = pci_get_node_name(dev);
_FDT(offset = fdt_add_subnode(fdt, node_offset, nodename));
g_free(nodename);
spapr_populate_pci_child_dt(dev, fdt, offset, phb);
g_assert(!ret);
if (ret) {
return 0;
}
return offset;
}
@ -1428,10 +1407,6 @@ static void spapr_pci_plug(HotplugHandler *plug_handler,
fdt = create_device_tree(&fdt_size);
fdt_start_offset = spapr_create_pci_child_dt(phb, pdev, fdt, 0);
if (!fdt_start_offset) {
error_setg(&local_err, "Failed to create pci child device tree node");
goto out;
}
spapr_drc_attach(drc, DEVICE(pdev), fdt, fdt_start_offset, &local_err);
if (local_err) {
@ -1634,34 +1609,43 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
sphb->dtbusname = g_strdup_printf("pci@%" PRIx64, sphb->buid);
namebuf = alloca(strlen(sphb->dtbusname) + 32);
/* Initialize memory regions */
sprintf(namebuf, "%s.mmio", sphb->dtbusname);
namebuf = g_strdup_printf("%s.mmio", sphb->dtbusname);
memory_region_init(&sphb->memspace, OBJECT(sphb), namebuf, UINT64_MAX);
g_free(namebuf);
sprintf(namebuf, "%s.mmio32-alias", sphb->dtbusname);
namebuf = g_strdup_printf("%s.mmio32-alias", sphb->dtbusname);
memory_region_init_alias(&sphb->mem32window, OBJECT(sphb),
namebuf, &sphb->memspace,
SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size);
g_free(namebuf);
memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr,
&sphb->mem32window);
sprintf(namebuf, "%s.mmio64-alias", sphb->dtbusname);
memory_region_init_alias(&sphb->mem64window, OBJECT(sphb),
namebuf, &sphb->memspace,
sphb->mem64_win_pciaddr, sphb->mem64_win_size);
memory_region_add_subregion(get_system_memory(), sphb->mem64_win_addr,
&sphb->mem64window);
if (sphb->mem64_win_pciaddr != (hwaddr)-1) {
namebuf = g_strdup_printf("%s.mmio64-alias", sphb->dtbusname);
memory_region_init_alias(&sphb->mem64window, OBJECT(sphb),
namebuf, &sphb->memspace,
sphb->mem64_win_pciaddr, sphb->mem64_win_size);
g_free(namebuf);
if (sphb->mem64_win_addr != (hwaddr)-1) {
memory_region_add_subregion(get_system_memory(),
sphb->mem64_win_addr,
&sphb->mem64window);
}
}
/* Initialize IO regions */
sprintf(namebuf, "%s.io", sphb->dtbusname);
namebuf = g_strdup_printf("%s.io", sphb->dtbusname);
memory_region_init(&sphb->iospace, OBJECT(sphb),
namebuf, SPAPR_PCI_IO_WIN_SIZE);
g_free(namebuf);
sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
namebuf = g_strdup_printf("%s.io-alias", sphb->dtbusname);
memory_region_init_alias(&sphb->iowindow, OBJECT(sphb), namebuf,
&sphb->iospace, 0, SPAPR_PCI_IO_WIN_SIZE);
g_free(namebuf);
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
@ -1679,10 +1663,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
* Later the guest might want to create another DMA window
* which will become another memory subregion.
*/
sprintf(namebuf, "%s.iommu-root", sphb->dtbusname);
namebuf = g_strdup_printf("%s.iommu-root", sphb->dtbusname);
memory_region_init(&sphb->iommu_root, OBJECT(sphb),
namebuf, UINT64_MAX);
g_free(namebuf);
address_space_init(&sphb->iommu_as, &sphb->iommu_root,
sphb->dtbusname);
@ -2076,7 +2060,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
void *fdt)
{
int bus_off, i, j, ret;
char nodename[FDT_NAME_MAX];
gchar *nodename;
uint32_t bus_range[] = { cpu_to_be32(0), cpu_to_be32(0xff) };
struct {
uint32_t hi;
@ -2125,11 +2109,9 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
sPAPRFDT s_fdt;
/* Start populating the FDT */
snprintf(nodename, FDT_NAME_MAX, "pci@%" PRIx64, phb->buid);
bus_off = fdt_add_subnode(fdt, 0, nodename);
if (bus_off < 0) {
return bus_off;
}
nodename = g_strdup_printf("pci@%" PRIx64, phb->buid);
_FDT(bus_off = fdt_add_subnode(fdt, 0, nodename));
g_free(nodename);
/* Write PHB properties */
_FDT(fdt_setprop_string(fdt, bus_off, "device_type", "pci"));

2
hw/vfio/spapr.c
View File

@ -163,7 +163,7 @@ int vfio_spapr_create_window(VFIOContainer *container,
*/
entries = create.window_size >> create.page_shift;
pages = MAX((entries * sizeof(uint64_t)) / getpagesize(), 1);
pages = MAX(pow2ceil(pages) - 1, 1); /* Round up */
pages = MAX(pow2ceil(pages), 1); /* Round up */
create.levels = ctz64(pages) / 6 + 1;
ret = ioctl(container->fd, VFIO_IOMMU_SPAPR_TCE_CREATE, &create);

1
include/hw/pci/pci_ids.h
View File

@ -183,6 +183,7 @@
#define PCI_VENDOR_ID_APPLE 0x106b
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
#define PCI_VENDOR_ID_SUN 0x108e
#define PCI_DEVICE_ID_SUN_EBUS 0x1000

3
include/hw/ppc/spapr_ovec.h
View File

@ -51,7 +51,8 @@ typedef struct sPAPROptionVector sPAPROptionVector;
#define OV5_FORM1_AFFINITY OV_BIT(5, 0)
#define OV5_HP_EVT OV_BIT(6, 5)
#define OV5_HPT_RESIZE OV_BIT(6, 7)
#define OV5_XIVE_EXPLOIT OV_BIT(23, 7)
#define OV5_XIVE_BOTH OV_BIT(23, 0)
#define OV5_XIVE_EXPLOIT OV_BIT(23, 1) /* 1=exploitation 0=legacy */
/* ISA 3.00 MMU features: */
#define OV5_MMU_BOTH OV_BIT(24, 0) /* Radix and hash */

2
target/ppc/kvm.c
View File

@ -120,7 +120,7 @@ static void kvm_kick_cpu(void *opaque)
static bool kvmppc_is_pr(KVMState *ks)
{
/* Assume KVM-PR if the GET_PVINFO capability is available */
return kvm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0;
return kvm_vm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0;
}
static int kvm_ppc_register_host_cpu_type(void);