added shiftd support - improved auto test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@20 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
4b74fe1f00
commit
d57c4e0120
1
Makefile
1
Makefile
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@ -84,6 +84,7 @@ dis-asm.h gen-i386.h op-i386.h syscall.c\
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dis-buf.c i386-dis.c opreg_template.h syscall_defs.h\
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i386.ld ppc.ld\
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tests/test-i386.c tests/test-i386-shift.h tests/test-i386.h\
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tests/test-i386-muldiv.h\
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tests/test2.c tests/hello.c tests/sha1.c tests/test1.c
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FILE=gemu-$(VERSION)
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@ -149,9 +149,8 @@ typedef struct CPUX86State {
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uint32_t segs[6];
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/* emulator internal variables */
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CPU86_LDouble ft0;
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/* exception handling */
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jmp_buf jmp_env;
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int exception_index;
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144
ops_template.h
144
ops_template.h
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@ -175,12 +175,13 @@ static int glue(compute_all_dec, SUFFIX)(void)
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static int glue(compute_all_shl, SUFFIX)(void)
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{
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int cf, pf, af, zf, sf, of;
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cf = CC_SRC & 1;
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cf = (CC_SRC >> (DATA_BITS - 1)) & CC_C;
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pf = parity_table[(uint8_t)CC_DST];
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af = 0; /* undefined */
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zf = ((DATA_TYPE)CC_DST == 0) << 6;
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sf = lshift(CC_DST, 8 - DATA_BITS) & 0x80;
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of = lshift(CC_SRC, 12 - DATA_BITS) & CC_O; /* only meaniful for shr with count == 1 */
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/* of is defined if shift count == 1 */
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of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O;
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return cf | pf | af | zf | sf | of;
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}
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@ -199,7 +200,8 @@ static int glue(compute_all_sar, SUFFIX)(void)
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af = 0; /* undefined */
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zf = ((DATA_TYPE)CC_DST == 0) << 6;
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sf = lshift(CC_DST, 8 - DATA_BITS) & 0x80;
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of = 0; /* only meaniful for shr with count == 1 */
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/* of is defined if shift count == 1 */
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of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O;
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return cf | pf | af | zf | sf | of;
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}
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@ -415,13 +417,8 @@ void OPPROTO glue(glue(op_shl, SUFFIX), _T0_T1_cc)(void)
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{
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int count;
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count = T1 & 0x1f;
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if (count == 1) {
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CC_SRC = T0;
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T0 = T0 << 1;
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CC_DST = T0;
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CC_OP = CC_OP_ADDB + SHIFT;
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} else if (count) {
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CC_SRC = (DATA_TYPE)T0 >> (DATA_BITS - count);
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if (count) {
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CC_SRC = (DATA_TYPE)T0 << (count - 1);
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T0 = T0 << count;
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CC_DST = T0;
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CC_OP = CC_OP_SHLB + SHIFT;
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@ -438,7 +435,7 @@ void OPPROTO glue(glue(op_shr, SUFFIX), _T0_T1_cc)(void)
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CC_SRC = T0 >> (count - 1);
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T0 = T0 >> count;
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CC_DST = T0;
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CC_OP = CC_OP_SHLB + SHIFT;
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CC_OP = CC_OP_SARB + SHIFT;
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}
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FORCE_RET();
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}
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@ -449,7 +446,7 @@ void OPPROTO glue(glue(op_sar, SUFFIX), _T0_T1_cc)(void)
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count = T1 & 0x1f;
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if (count) {
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src = (DATA_STYPE)T0;
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CC_SRC = src >> (count - 1);
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CC_SRC = src >> (count - 1);
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T0 = src >> count;
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CC_DST = T0;
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CC_OP = CC_OP_SARB + SHIFT;
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@ -457,6 +454,129 @@ void OPPROTO glue(glue(op_sar, SUFFIX), _T0_T1_cc)(void)
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FORCE_RET();
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}
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#if DATA_BITS == 16
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/* XXX: overflow flag might be incorrect in some cases in shldw */
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void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_im_cc)(void)
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{
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int count;
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unsigned int res;
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count = PARAM1;
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T1 &= 0xffff;
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res = T1 | (T0 << 16);
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CC_SRC = res >> (32 - count);
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res <<= count;
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if (count > 16)
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res |= T1 << (count - 16);
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T0 = res >> 16;
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CC_DST = T0;
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}
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void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_ECX_cc)(void)
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{
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int count;
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unsigned int res;
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count = ECX & 0x1f;
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if (count) {
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T1 &= 0xffff;
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res = T1 | (T0 << 16);
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CC_SRC = res >> (32 - count);
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res <<= count;
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if (count > 16)
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res |= T1 << (count - 16);
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T0 = res >> 16;
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CC_DST = T0;
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CC_OP = CC_OP_SARB + SHIFT;
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}
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}
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void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_im_cc)(void)
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{
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int count;
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unsigned int res;
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count = PARAM1;
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res = (T0 & 0xffff) | (T1 << 16);
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CC_SRC = res >> (count - 1);
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res >>= count;
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if (count > 16)
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res |= T1 << (32 - count);
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T0 = res;
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CC_DST = T0;
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}
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void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_ECX_cc)(void)
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{
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int count;
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unsigned int res;
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count = ECX & 0x1f;
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if (count) {
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res = (T0 & 0xffff) | (T1 << 16);
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CC_SRC = res >> (count - 1);
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res >>= count;
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if (count > 16)
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res |= T1 << (32 - count);
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T0 = res;
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CC_DST = T0;
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CC_OP = CC_OP_SARB + SHIFT;
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}
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}
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#endif
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#if DATA_BITS == 32
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void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_im_cc)(void)
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{
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int count;
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count = PARAM1;
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T0 &= DATA_MASK;
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T1 &= DATA_MASK;
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CC_SRC = T0 << (count - 1);
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T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
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CC_DST = T0;
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}
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void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_ECX_cc)(void)
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{
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int count;
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count = ECX & 0x1f;
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if (count) {
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T0 &= DATA_MASK;
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T1 &= DATA_MASK;
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CC_SRC = T0 << (count - 1);
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T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
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CC_DST = T0;
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CC_OP = CC_OP_SHLB + SHIFT;
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}
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}
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void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_im_cc)(void)
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{
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int count;
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count = PARAM1;
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T0 &= DATA_MASK;
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T1 &= DATA_MASK;
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CC_SRC = T0 >> (count - 1);
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T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
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CC_DST = T0;
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}
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void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_ECX_cc)(void)
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{
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int count;
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count = ECX & 0x1f;
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if (count) {
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T0 &= DATA_MASK;
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T1 &= DATA_MASK;
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CC_SRC = T0 >> (count - 1);
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T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
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CC_DST = T0;
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CC_OP = CC_OP_SARB + SHIFT;
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}
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}
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#endif
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/* carry add/sub (we only need to set CC_OP differently) */
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void OPPROTO glue(glue(op_adc, SUFFIX), _T0_T1_cc)(void)
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@ -19,7 +19,7 @@ test2: test2.c
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$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
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# i386 emulation test (dump various opcodes) */
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test-i386: test-i386.c test-i386.h test-i386-shift.h
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test-i386: test-i386.c test-i386.h test-i386-shift.h test-i386-muldiv.h
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$(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ $<
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test: test-i386
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@ -0,0 +1,56 @@
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void glue(glue(test_, OP), b)(int op0, int op1)
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{
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int res, s1, s0, flags;
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s0 = op0;
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s1 = op1;
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res = s0;
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flags = 0;
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asm ("push %4\n\t"
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"popf\n\t"
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stringify(OP)"b %b2\n\t"
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"pushf\n\t"
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"popl %1\n\t"
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: "=a" (res), "=g" (flags)
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: "q" (s1), "0" (res), "1" (flags));
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printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
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stringify(OP) "b", s0, s1, res, flags & CC_MASK);
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}
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void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
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{
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int res, s1, flags, resh;
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s1 = op1;
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resh = op0h;
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res = op0;
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flags = 0;
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asm ("push %5\n\t"
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"popf\n\t"
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stringify(OP) "w %w3\n\t"
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"pushf\n\t"
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"popl %1\n\t"
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: "=a" (res), "=g" (flags), "=d" (resh)
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: "q" (s1), "0" (res), "1" (flags), "2" (resh));
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printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
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stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
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}
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void glue(glue(test_, OP), l)(int op0h, int op0, int op1)
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{
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int res, s1, flags, resh;
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s1 = op1;
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resh = op0h;
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res = op0;
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flags = 0;
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asm ("push %5\n\t"
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"popf\n\t"
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stringify(OP) "l %3\n\t"
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"pushf\n\t"
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"popl %1\n\t"
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: "=a" (res), "=g" (flags), "=d" (resh)
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: "q" (s1), "0" (res), "1" (flags), "2" (resh));
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printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
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stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
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}
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#undef OP
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@ -4,7 +4,19 @@
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#define exec_opw glue(glue(exec_, OP), w)
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#define exec_opb glue(glue(exec_, OP), b)
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#define EXECSHIFT(size, res, s1, flags) \
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#ifndef OP_SHIFTD
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#ifdef OP_NOBYTE
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#define EXECSHIFT(size, res, s1, s2, flags) \
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asm ("push %4\n\t"\
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"popf\n\t"\
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stringify(OP) size " %" size "2, %" size "0\n\t" \
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"pushf\n\t"\
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"popl %1\n\t"\
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: "=g" (res), "=g" (flags)\
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: "r" (s1), "0" (res), "1" (flags));
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#else
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#define EXECSHIFT(size, res, s1, s2, flags) \
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asm ("push %4\n\t"\
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"popf\n\t"\
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stringify(OP) size " %%cl, %" size "0\n\t" \
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@ -12,13 +24,14 @@
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"popl %1\n\t"\
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: "=q" (res), "=g" (flags)\
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: "c" (s1), "0" (res), "1" (flags));
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#endif
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void exec_opl(int s0, int s1, int iflags)
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void exec_opl(int s2, int s0, int s1, int iflags)
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{
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int res, flags;
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res = s0;
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flags = iflags;
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EXECSHIFT("", res, s1, flags);
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EXECSHIFT("", res, s1, s2, flags);
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/* overflow is undefined if count != 1 */
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if (s1 != 1)
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flags &= ~CC_O;
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@ -26,12 +39,12 @@ void exec_opl(int s0, int s1, int iflags)
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stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
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}
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void exec_opw(int s0, int s1, int iflags)
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void exec_opw(int s2, int s0, int s1, int iflags)
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{
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int res, flags;
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res = s0;
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flags = iflags;
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EXECSHIFT("w", res, s1, flags);
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EXECSHIFT("w", res, s1, s2, flags);
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/* overflow is undefined if count != 1 */
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if (s1 != 1)
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flags &= ~CC_O;
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@ -39,27 +52,69 @@ void exec_opw(int s0, int s1, int iflags)
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stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
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}
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#else
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#define EXECSHIFT(size, res, s1, s2, flags) \
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asm ("push %4\n\t"\
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"popf\n\t"\
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stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
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"pushf\n\t"\
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"popl %1\n\t"\
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: "=g" (res), "=g" (flags)\
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: "c" (s1), "0" (res), "1" (flags), "r" (s2));
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void exec_opl(int s2, int s0, int s1, int iflags)
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{
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int res, flags;
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res = s0;
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flags = iflags;
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EXECSHIFT("", res, s1, s2, flags);
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/* overflow is undefined if count != 1 */
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if (s1 != 1)
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flags &= ~CC_O;
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printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
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stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
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}
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void exec_opw(int s2, int s0, int s1, int iflags)
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{
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int res, flags;
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res = s0;
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flags = iflags;
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EXECSHIFT("w", res, s1, s2, flags);
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/* overflow is undefined if count != 1 */
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if (s1 != 1)
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flags &= ~CC_O;
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printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
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stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
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}
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#endif
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#ifndef OP_NOBYTE
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void exec_opb(int s0, int s1, int iflags)
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{
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int res, flags;
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res = s0;
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flags = iflags;
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EXECSHIFT("b", res, s1, flags);
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EXECSHIFT("b", res, s1, 0, flags);
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/* overflow is undefined if count != 1 */
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if (s1 != 1)
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flags &= ~CC_O;
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printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
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stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
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}
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#endif
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void exec_op(int s0, int s1)
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void exec_op(int s2, int s0, int s1)
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{
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exec_opl(s0, s1, 0);
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exec_opw(s0, s1, 0);
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exec_opl(s2, s0, s1, 0);
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exec_opw(s2, s0, s1, 0);
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#ifndef OP_NOBYTE
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exec_opb(s0, s1, 0);
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#endif
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#ifdef OP_CC
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exec_opl(s0, s1, CC_C);
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exec_opw(s0, s1, CC_C);
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exec_opl(s2, s0, s1, CC_C);
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exec_opw(s2, s0, s1, CC_C);
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exec_opb(s0, s1, CC_C);
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#endif
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}
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@ -68,12 +123,16 @@ void glue(test_, OP)(void)
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{
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int i;
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for(i = 0; i < 32; i++)
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exec_op(0x12345678, i);
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exec_op(0x21ad3d34, 0x12345678, i);
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for(i = 0; i < 32; i++)
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exec_op(0x82345678, i);
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exec_op(0x813f3421, 0x82345678, i);
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}
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void *glue(_test_, OP) __init_call = glue(test_, OP);
|
||||
|
||||
#undef OP
|
||||
#undef OP_CC
|
||||
#undef OP_SHIFTD
|
||||
#undef OP_NOBYTE
|
||||
#undef EXECSHIFT
|
||||
|
||||
|
|
|
|||
|
|
@ -92,6 +92,35 @@ static void *call_start __init_call = NULL;
|
|||
#define OP_CC
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
#define OP shld
|
||||
#define OP_SHIFTD
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
#define OP shrd
|
||||
#define OP_SHIFTD
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
/* XXX: should be more precise ? */
|
||||
#undef CC_MASK
|
||||
#define CC_MASK (CC_C)
|
||||
|
||||
#define OP bt
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
#define OP bts
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
#define OP btr
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
#define OP btc
|
||||
#define OP_NOBYTE
|
||||
#include "test-i386-shift.h"
|
||||
|
||||
/* lea test (modrm support) */
|
||||
#define TEST_LEA(STR)\
|
||||
|
|
@ -403,15 +432,13 @@ int main(int argc, char **argv)
|
|||
void **ptr;
|
||||
void (*func)(void);
|
||||
|
||||
test_mul();
|
||||
#if 0
|
||||
ptr = &call_start + 1;
|
||||
while (*ptr != NULL) {
|
||||
func = *ptr++;
|
||||
func();
|
||||
}
|
||||
test_mul();
|
||||
test_jcc();
|
||||
test_lea();
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,131 @@
|
|||
|
||||
#define exec_op glue(exec_, OP)
|
||||
#define exec_opl glue(glue(exec_, OP), l)
|
||||
#define exec_opw glue(glue(exec_, OP), w)
|
||||
#define exec_opb glue(glue(exec_, OP), b)
|
||||
|
||||
#define EXECOP2(size, res, s1, flags) \
|
||||
asm ("push %4\n\t"\
|
||||
"popf\n\t"\
|
||||
stringify(OP) size " %" size "2, %" size "0\n\t" \
|
||||
"pushf\n\t"\
|
||||
"popl %1\n\t"\
|
||||
: "=q" (res), "=g" (flags)\
|
||||
: "q" (s1), "0" (res), "1" (flags));
|
||||
|
||||
#define EXECOP1(size, res, flags) \
|
||||
asm ("push %3\n\t"\
|
||||
"popf\n\t"\
|
||||
stringify(OP) size " %" size "0\n\t" \
|
||||
"pushf\n\t"\
|
||||
"popl %1\n\t"\
|
||||
: "=q" (res), "=g" (flags)\
|
||||
: "0" (res), "1" (flags));
|
||||
|
||||
#ifdef OP1
|
||||
void exec_opl(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP1("", res, flags);
|
||||
printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
|
||||
void exec_opw(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP1("w", res, flags);
|
||||
printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
|
||||
void exec_opb(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP1("b", res, flags);
|
||||
printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
#else
|
||||
void exec_opl(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP2("", res, s1, flags);
|
||||
printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
|
||||
void exec_opw(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP2("w", res, s1, flags);
|
||||
printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
|
||||
void exec_opb(int s0, int s1, int iflags)
|
||||
{
|
||||
int res, flags;
|
||||
res = s0;
|
||||
flags = iflags;
|
||||
EXECOP2("b", res, s1, flags);
|
||||
printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
|
||||
stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
|
||||
}
|
||||
#endif
|
||||
|
||||
void exec_op(int s0, int s1)
|
||||
{
|
||||
exec_opl(s0, s1, 0);
|
||||
exec_opw(s0, s1, 0);
|
||||
exec_opb(s0, s1, 0);
|
||||
#ifdef OP_CC
|
||||
exec_opl(s0, s1, CC_C);
|
||||
exec_opw(s0, s1, CC_C);
|
||||
exec_opb(s0, s1, CC_C);
|
||||
#endif
|
||||
}
|
||||
|
||||
void glue(test_, OP)(void)
|
||||
{
|
||||
exec_op(0x12345678, 0x812FADA);
|
||||
exec_op(0x12341, 0x12341);
|
||||
exec_op(0x12341, -0x12341);
|
||||
exec_op(0xffffffff, 0);
|
||||
exec_op(0xffffffff, -1);
|
||||
exec_op(0xffffffff, 1);
|
||||
exec_op(0xffffffff, 2);
|
||||
exec_op(0x7fffffff, 0);
|
||||
exec_op(0x7fffffff, 1);
|
||||
exec_op(0x7fffffff, -1);
|
||||
exec_op(0x80000000, -1);
|
||||
exec_op(0x80000000, 1);
|
||||
exec_op(0x80000000, -2);
|
||||
exec_op(0x12347fff, 0);
|
||||
exec_op(0x12347fff, 1);
|
||||
exec_op(0x12347fff, -1);
|
||||
exec_op(0x12348000, -1);
|
||||
exec_op(0x12348000, 1);
|
||||
exec_op(0x12348000, -2);
|
||||
exec_op(0x12347f7f, 0);
|
||||
exec_op(0x12347f7f, 1);
|
||||
exec_op(0x12347f7f, -1);
|
||||
exec_op(0x12348080, -1);
|
||||
exec_op(0x12348080, 1);
|
||||
exec_op(0x12348080, -2);
|
||||
}
|
||||
|
||||
void *glue(_test_, OP) __init_call = glue(test_, OP);
|
||||
|
||||
#undef OP
|
||||
#undef OP_CC
|
||||
|
|
@ -394,6 +394,28 @@ static GenOpFunc *gen_op_shift_T0_T1_cc[3][8] = {
|
|||
},
|
||||
};
|
||||
|
||||
static GenOpFunc1 *gen_op_shiftd_T0_T1_im_cc[2][2] = {
|
||||
[0] = {
|
||||
gen_op_shldw_T0_T1_im_cc,
|
||||
gen_op_shrdw_T0_T1_im_cc,
|
||||
},
|
||||
[1] = {
|
||||
gen_op_shldl_T0_T1_im_cc,
|
||||
gen_op_shrdl_T0_T1_im_cc,
|
||||
},
|
||||
};
|
||||
|
||||
static GenOpFunc *gen_op_shiftd_T0_T1_ECX_cc[2][2] = {
|
||||
[0] = {
|
||||
gen_op_shldw_T0_T1_ECX_cc,
|
||||
gen_op_shrdw_T0_T1_ECX_cc,
|
||||
},
|
||||
[1] = {
|
||||
gen_op_shldl_T0_T1_ECX_cc,
|
||||
gen_op_shrdl_T0_T1_ECX_cc,
|
||||
},
|
||||
};
|
||||
|
||||
static GenOpFunc *gen_op_btx_T0_T1_cc[2][4] = {
|
||||
[0] = {
|
||||
gen_op_btw_T0_T1_cc,
|
||||
|
|
@ -1689,6 +1711,59 @@ long disas_insn(DisasContext *s, uint8_t *pc_start, int *is_jmp_ptr)
|
|||
shift = 0;
|
||||
goto grp2;
|
||||
|
||||
case 0x1a4: /* shld imm */
|
||||
op = 0;
|
||||
shift = 1;
|
||||
goto do_shiftd;
|
||||
case 0x1a5: /* shld cl */
|
||||
op = 0;
|
||||
shift = 0;
|
||||
goto do_shiftd;
|
||||
case 0x1ac: /* shrd imm */
|
||||
op = 1;
|
||||
shift = 1;
|
||||
goto do_shiftd;
|
||||
case 0x1ad: /* shrd cl */
|
||||
op = 1;
|
||||
shift = 0;
|
||||
do_shiftd:
|
||||
ot = dflag ? OT_LONG : OT_WORD;
|
||||
modrm = ldub(s->pc++);
|
||||
mod = (modrm >> 6) & 3;
|
||||
rm = modrm & 7;
|
||||
reg = (modrm >> 3) & 7;
|
||||
|
||||
if (mod != 3) {
|
||||
gen_lea_modrm(s, modrm, ®_addr, &offset_addr);
|
||||
gen_op_ld_T0_A0[ot]();
|
||||
} else {
|
||||
gen_op_mov_TN_reg[ot][0][rm]();
|
||||
}
|
||||
gen_op_mov_TN_reg[ot][1][reg]();
|
||||
|
||||
if (shift) {
|
||||
val = ldub(s->pc++);
|
||||
val &= 0x1f;
|
||||
if (val) {
|
||||
gen_op_shiftd_T0_T1_im_cc[ot - OT_WORD][op](val);
|
||||
if (op == 0 && ot != OT_WORD)
|
||||
s->cc_op = CC_OP_SHLB + ot;
|
||||
else
|
||||
s->cc_op = CC_OP_SARB + ot;
|
||||
}
|
||||
} else {
|
||||
if (s->cc_op != CC_OP_DYNAMIC)
|
||||
gen_op_set_cc_op(s->cc_op);
|
||||
gen_op_shiftd_T0_T1_ECX_cc[ot - OT_WORD][op]();
|
||||
s->cc_op = CC_OP_DYNAMIC; /* cannot predict flags after */
|
||||
}
|
||||
if (mod != 3) {
|
||||
gen_op_st_T0_A0[ot]();
|
||||
} else {
|
||||
gen_op_mov_reg_T0[ot][rm]();
|
||||
}
|
||||
break;
|
||||
|
||||
/************************/
|
||||
/* floats */
|
||||
case 0xd8 ... 0xdf:
|
||||
|
|
@ -2002,6 +2077,7 @@ long disas_insn(DisasContext *s, uint8_t *pc_start, int *is_jmp_ptr)
|
|||
break;
|
||||
#endif
|
||||
default:
|
||||
error("unhandled FP df/4\n");
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
|
|
@ -2291,7 +2367,7 @@ long disas_insn(DisasContext *s, uint8_t *pc_start, int *is_jmp_ptr)
|
|||
return -1;
|
||||
op -= 4;
|
||||
gen_op_btx_T0_T1_cc[ot - OT_WORD][op]();
|
||||
s->cc_op = CC_OP_SHLB + ot;
|
||||
s->cc_op = CC_OP_SARB + ot;
|
||||
if (op != 0) {
|
||||
if (mod != 3)
|
||||
gen_op_st_T0_A0[ot]();
|
||||
|
|
@ -2329,7 +2405,7 @@ long disas_insn(DisasContext *s, uint8_t *pc_start, int *is_jmp_ptr)
|
|||
gen_op_mov_TN_reg[ot][0][rm]();
|
||||
}
|
||||
gen_op_btx_T0_T1_cc[ot - OT_WORD][op]();
|
||||
s->cc_op = CC_OP_SHLB + ot;
|
||||
s->cc_op = CC_OP_SARB + ot;
|
||||
if (op != 0) {
|
||||
if (mod != 3)
|
||||
gen_op_st_T0_A0[ot]();
|
||||
|
|
@ -2417,7 +2493,8 @@ int cpu_x86_gen_code(uint8_t *gen_code_buf, int *gen_code_size_ptr,
|
|||
is_jmp = 0;
|
||||
ret = disas_insn(dc, pc_start, &is_jmp);
|
||||
if (ret == -1)
|
||||
error("unknown instruction at PC=0x%x", pc_start);
|
||||
error("unknown instruction at PC=0x%x B=%02x %02x",
|
||||
pc_start, pc_start[0], pc_start[1]);
|
||||
/* we must store the eflags state if it is not already done */
|
||||
if (dc->cc_op != CC_OP_DYNAMIC)
|
||||
gen_op_set_cc_op(dc->cc_op);
|
||||
|
|
|
|||
Loading…
Reference in New Issue