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hw/virtio: fix Link Control Register for PCI Express virtio devices

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Make several Link Control Register flags writable to conform
with the PCI Express spec.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Marcel Apfelbaum 2017-02-20 22:43:12 +02:00 committed by Michael S. Tsirkin
parent c2cabb3422
commit d584f1b9ca
5 changed files with 33 additions and 0 deletions
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14
hw/pci/pcie.c
View File

@ -223,6 +223,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev)
PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE);
} }
void pcie_cap_lnkctl_init(PCIDevice *dev)
{
uint32_t pos = dev->exp.exp_cap;
pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL,
PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
}
void pcie_cap_lnkctl_reset(PCIDevice *dev)
{
uint8_t *lnkctl = dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL;
pci_long_test_and_clear_mask(lnkctl,
PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
}
static void hotplug_event_update_event_status(PCIDevice *dev) static void hotplug_event_update_event_status(PCIDevice *dev)
{ {
uint32_t pos = dev->exp.exp_cap; uint32_t pos = dev->exp.exp_cap;

8
hw/virtio/virtio-pci.c
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@ -1824,6 +1824,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
pcie_cap_deverr_init(pci_dev); pcie_cap_deverr_init(pci_dev);
} }
if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
/* Init Link Control Register */
pcie_cap_lnkctl_init(pci_dev);
}
if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
pcie_ats_init(pci_dev, 256); pcie_ats_init(pci_dev, 256);
} }
@ -1871,6 +1876,7 @@ static void virtio_pci_reset(DeviceState *qdev)
if (pci_is_express(dev)) { if (pci_is_express(dev)) {
pcie_cap_deverr_reset(dev); pcie_cap_deverr_reset(dev);
pcie_cap_lnkctl_reset(dev);
} }
} }
@ -1894,6 +1900,8 @@ static Property virtio_pci_properties[] = {
VIRTIO_PCI_FLAG_ATS_BIT, false), VIRTIO_PCI_FLAG_ATS_BIT, false),
DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
DEFINE_PROP_END_OF_LIST(), DEFINE_PROP_END_OF_LIST(),
}; };

4
hw/virtio/virtio-pci.h
View File

@ -74,6 +74,7 @@ enum {
VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT,
VIRTIO_PCI_FLAG_ATS_BIT, VIRTIO_PCI_FLAG_ATS_BIT,
VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
}; };
/* Need to activate work-arounds for buggy guests at vmstate load. */ /* Need to activate work-arounds for buggy guests at vmstate load. */
@ -104,6 +105,9 @@ enum {
/* Init error enabling flags */ /* Init error enabling flags */
#define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT) #define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT)
/* Init Link Control register */
#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT)
typedef struct { typedef struct {
MSIMessage msg; MSIMessage msg;
int virq; int virq;

4
include/hw/compat.h
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@ -26,6 +26,10 @@
.driver = "virtio-pci",\ .driver = "virtio-pci",\
.property = "x-pcie-deverr-init",\ .property = "x-pcie-deverr-init",\
.value = "off",\ .value = "off",\
},{\
.driver = "virtio-pci",\
.property = "x-pcie-lnkctl-init",\
.value = "off",\
}, },
#define HW_COMPAT_2_7 \ #define HW_COMPAT_2_7 \

3
include/hw/pci/pcie.h
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@ -96,6 +96,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev);
void pcie_cap_deverr_init(PCIDevice *dev); void pcie_cap_deverr_init(PCIDevice *dev);
void pcie_cap_deverr_reset(PCIDevice *dev); void pcie_cap_deverr_reset(PCIDevice *dev);
void pcie_cap_lnkctl_init(PCIDevice *dev);
void pcie_cap_lnkctl_reset(PCIDevice *dev);
void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot);
void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_reset(PCIDevice *dev);
void pcie_cap_slot_write_config(PCIDevice *dev, void pcie_cap_slot_write_config(PCIDevice *dev,