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hw/mips: spelling fixes

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Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230823065335.1919380-7-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Michael Tokarev 2023-08-23 09:53:19 +03:00 committed by Philippe Mathieu-Daudé
parent 33a5230782
commit d5c9fa4708
4 changed files with 11 additions and 11 deletions
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2
hw/mips/malta.c
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@ -627,7 +627,7 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr,
10, 10, 11, 11 /* PIIX IRQRC[A:D] */
};
/* Bus endianess is always reversed */
/* Bus endianness is always reversed */
#if TARGET_BIG_ENDIAN
#define cpu_to_gt32(x) (x)
#else

2
target/mips/cpu-defs.c.inc
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@ -1045,7 +1045,7 @@ static void mvp_init(CPUMIPSState *env)
return;
}
/* MVPConf1 implemented, TLB sharable, no gating storage support,
/* MVPConf1 implemented, TLB shareable, no gating storage support,
programmable cache partitioning implemented, number of allocatable
and shareable TLB entries, MVP has allocatable TCs, 2 VPEs
implemented, 5 TCs implemented. */

12
target/mips/tcg/msa_helper.c
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@ -803,9 +803,9 @@ void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
* | HADD_S.H | Vector Signed Horizontal Add (halfword) |
* | HADD_S.W | Vector Signed Horizontal Add (word) |
* | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
* | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
* | HADD_U.W | Vector Unigned Horizontal Add (word) |
* | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
* | HADD_U.H | Vector Unsigned Horizontal Add (halfword) |
* | HADD_U.W | Vector Unsigned Horizontal Add (word) |
* | HADD_U.D | Vector Unsigned Horizontal Add (doubleword) |
* +---------------+----------------------------------------------------------+
*/
@ -3452,9 +3452,9 @@ void helper_msa_mulv_d(CPUMIPSState *env,
* | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
* | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
* | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
* | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
* | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
* | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
* | HSUB_U.H | Vector Unsigned Horizontal Subtract (halfword) |
* | HSUB_U.W | Vector Unsigned Horizontal Subtract (word) |
* | HSUB_U.D | Vector Unsigned Horizontal Subtract (doubleword) |
* | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
* | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
* | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |

6
target/mips/tcg/mxu_translate.c
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@ -2977,14 +2977,14 @@ static void gen_mxu_Q8ADD(DisasContext *ctx)
* to another one in XRc, with zero extending
* to 16-bit and put results as packed 16-bit data
* into XRa and XRd.
* aptn2 manages action add or subract of pairs of data.
* aptn2 manages action add or subtract of pairs of data.
*
* Q8ACCE XRa, XRb, XRc, XRd, aptn2
* Add/subtract quadruple of 8-bit packed in XRb
* to another one in XRc, with zero extending
* to 16-bit and accumulate results as packed 16-bit data
* into XRa and XRd.
* aptn2 manages action add or subract of pairs of data.
* aptn2 manages action add or subtract of pairs of data.
*/
static void gen_mxu_q8adde(DisasContext *ctx, bool accumulate)
{
@ -4056,7 +4056,7 @@ static void gen_mxu_s32sfl(DisasContext *ctx)
/*
* Q8SAD XRa, XRd, XRb, XRc
* Typical SAD opration for motion estimation.
* Typical SAD operation for motion estimation.
*/
static void gen_mxu_q8sad(DisasContext *ctx)
{