ac97: convert PIO to new memory api read/write
Signed-off-by: Alexander Graf <agraf@suse.de>
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parent
74d042e5ce
commit
d6a6d362aa
109
hw/ac97.c
109
hw/ac97.c
@ -1226,32 +1226,101 @@ static const VMStateDescription vmstate_ac97 = {
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}
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};
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static const MemoryRegionPortio nam_portio[] = {
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{ 0, 256 * 1, 1, .read = nam_readb, },
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{ 0, 256 * 2, 2, .read = nam_readw, },
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{ 0, 256 * 4, 4, .read = nam_readl, },
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{ 0, 256 * 1, 1, .write = nam_writeb, },
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{ 0, 256 * 2, 2, .write = nam_writew, },
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{ 0, 256 * 4, 4, .write = nam_writel, },
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PORTIO_END_OF_LIST (),
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};
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static uint64_t nam_read(void *opaque, hwaddr addr, unsigned size)
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{
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if ((addr / size) > 256) {
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return -1;
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}
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switch (size) {
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case 1:
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return nam_readb(opaque, addr);
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case 2:
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return nam_readw(opaque, addr);
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case 4:
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return nam_readl(opaque, addr);
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default:
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return -1;
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}
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}
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static void nam_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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if ((addr / size) > 256) {
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return;
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}
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switch (size) {
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case 1:
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nam_writeb(opaque, addr, val);
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break;
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case 2:
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nam_writew(opaque, addr, val);
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break;
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case 4:
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nam_writel(opaque, addr, val);
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break;
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}
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}
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static const MemoryRegionOps ac97_io_nam_ops = {
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.old_portio = nam_portio,
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.read = nam_read,
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.write = nam_write,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static const MemoryRegionPortio nabm_portio[] = {
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{ 0, 64 * 1, 1, .read = nabm_readb, },
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{ 0, 64 * 2, 2, .read = nabm_readw, },
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{ 0, 64 * 4, 4, .read = nabm_readl, },
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{ 0, 64 * 1, 1, .write = nabm_writeb, },
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{ 0, 64 * 2, 2, .write = nabm_writew, },
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{ 0, 64 * 4, 4, .write = nabm_writel, },
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PORTIO_END_OF_LIST ()
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};
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static uint64_t nabm_read(void *opaque, hwaddr addr, unsigned size)
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{
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if ((addr / size) > 64) {
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return -1;
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}
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switch (size) {
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case 1:
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return nabm_readb(opaque, addr);
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case 2:
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return nabm_readw(opaque, addr);
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case 4:
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return nabm_readl(opaque, addr);
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default:
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return -1;
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}
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}
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static void nabm_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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if ((addr / size) > 64) {
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return;
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}
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switch (size) {
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case 1:
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nabm_writeb(opaque, addr, val);
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break;
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case 2:
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nabm_writew(opaque, addr, val);
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break;
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case 4:
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nabm_writel(opaque, addr, val);
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break;
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}
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}
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static const MemoryRegionOps ac97_io_nabm_ops = {
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.old_portio = nabm_portio,
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.read = nabm_read,
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.write = nabm_write,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void ac97_on_reset (void *opaque)
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