target/riscv: Fix 32-bit HS mode access permissions
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: cb1ef2061547dc9028ce3cf4f6622588f9c09149.1617290165.git.alistair.francis@wdc.com
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@ -181,7 +181,11 @@ static RISCVException hmode(CPURISCVState *env, int csrno)
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static RISCVException hmode32(CPURISCVState *env, int csrno)
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{
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if (!riscv_cpu_is_32bit(env)) {
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return RISCV_EXCP_NONE;
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if (riscv_cpu_virt_enabled(env)) {
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return RISCV_EXCP_ILLEGAL_INST;
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} else {
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return RISCV_EXCP_VIRT_INSTRUCTION_FAULT;
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}
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}
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return hmode(env, csrno);
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