hw/i2c/aspeed: add DEV_ADDR in old register mode
Add support for writing and reading the device address register in old register mode. On the AST2400 (only 1 slave address) * no upper bits On the AST2500 (2 possible slave addresses), * bit[31] : Slave Address match indicator * bit[30] : Slave Address Receiving pending On the AST2600 (3 possible slave addresses), * bit[31-30] : Slave Address match indicator * bit[29] : Slave Address Receiving pending The model could be more precise to take into account all fields but since the Linux driver is masking the register value being set, it should be fine. See commit 3fb2e2aeafb2 ("i2c: aspeed: disable additional device addresses on ast2[56]xx") from Zeiv. This can be addressed later. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> [ clg: add details to commit log ] Message-Id: <20220601210831.67259-3-its@irrelevant.dk> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -83,6 +83,7 @@ static uint64_t aspeed_i2c_bus_old_read(AspeedI2CBus *bus, hwaddr offset,
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case A_I2CD_AC_TIMING2:
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case A_I2CD_INTR_CTRL:
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case A_I2CD_INTR_STS:
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case A_I2CD_DEV_ADDR:
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case A_I2CD_POOL_CTRL:
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case A_I2CD_BYTE_BUF:
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/* Value is already set, don't do anything. */
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@ -720,8 +721,7 @@ static void aspeed_i2c_bus_old_write(AspeedI2CBus *bus, hwaddr offset,
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}
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break;
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case A_I2CD_DEV_ADDR:
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qemu_log_mask(LOG_UNIMP, "%s: slave mode not implemented\n",
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__func__);
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bus->regs[R_I2CD_DEV_ADDR] = value;
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break;
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case A_I2CD_POOL_CTRL:
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bus->regs[R_I2CD_POOL_CTRL] &= ~0xffffff;
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@ -295,6 +295,14 @@ static inline uint32_t aspeed_i2c_bus_cmd_offset(AspeedI2CBus *bus)
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return R_I2CD_CMD;
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}
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static inline uint32_t aspeed_i2c_bus_dev_addr_offset(AspeedI2CBus *bus)
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{
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if (aspeed_i2c_is_new_mode(bus->controller)) {
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return R_I2CS_DEV_ADDR;
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}
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return R_I2CD_DEV_ADDR;
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}
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static inline uint32_t aspeed_i2c_bus_intr_ctrl_offset(AspeedI2CBus *bus)
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{
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if (aspeed_i2c_is_new_mode(bus->controller)) {
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