i386: Define -IBRS, -noTSX, -IBRS versions of CPU models
Add versions of CPU models that are equivalent to their -IBRS, -noTSX and -IBRS variants. The separate variants will eventually be removed and become aliases for these CPU versions. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190628002844.24894-6-ehabkost@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost
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dcafd1ef0a
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d86a708815
@ -1851,6 +1851,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_EXT3_LAHF_LM,
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.xlevel = 0x80000008,
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.model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Nehalem-IBRS */
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.props = (PropValue[]) {
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Nehalem-IBRS",
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@ -1907,6 +1921,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Westmere-IBRS */
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.props = (PropValue[]) {
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Westmere E56xx/L56xx/X56xx (IBRS update)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Westmere-IBRS",
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@ -1971,6 +1999,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Xeon E312xx (Sandy Bridge)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to SandyBridge-IBRS */
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.props = (PropValue[]) {
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "SandyBridge-IBRS",
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@ -2043,6 +2085,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to IvyBridge-IBRS */
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.props = (PropValue[]) {
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "IvyBridge-IBRS",
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@ -2205,6 +2261,52 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Core Processor (Haswell)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Haswell-noTSX */
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.props = (PropValue[]) {
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{ "hle", "off" },
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{ "rtm", "off" },
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{ "stepping", "1" },
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{ "model-id", "Intel Core Processor (Haswell, no TSX)", },
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{ /* end of list */ }
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},
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},
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{
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.version = 3,
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/* Equivalent to Haswell-IBRS */
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.props = (PropValue[]) {
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/* Restore TSX features removed by -v2 above */
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{ "hle", "on" },
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{ "rtm", "on" },
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/*
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* Haswell and Haswell-IBRS had stepping=4 in
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* QEMU 4.0 and older
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*/
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{ "stepping", "4" },
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Core Processor (Haswell, IBRS)" },
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{ /* end of list */ }
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}
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},
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{
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.version = 4,
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/* Equivalent to Haswell-noTSX-IBRS */
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.props = (PropValue[]) {
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{ "hle", "off" },
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{ "rtm", "off" },
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/* spec-ctrl was already enabled by -v3 above */
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{ "stepping", "1" },
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{ "model-id",
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"Intel Core Processor (Haswell, no TSX, IBRS)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Haswell-IBRS",
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@ -2375,6 +2477,45 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Core Processor (Broadwell)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Broadwell-noTSX */
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.props = (PropValue[]) {
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{ "hle", "off" },
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{ "rtm", "off" },
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{ "model-id", "Intel Core Processor (Broadwell, no TSX)", },
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{ /* end of list */ }
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},
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},
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{
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.version = 3,
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/* Equivalent to Broadwell-IBRS */
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.props = (PropValue[]) {
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/* Restore TSX features removed by -v2 above */
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{ "hle", "on" },
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{ "rtm", "on" },
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Core Processor (Broadwell, IBRS)" },
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{ /* end of list */ }
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}
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},
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{
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.version = 4,
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/* Equivalent to Broadwell-noTSX-IBRS */
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.props = (PropValue[]) {
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{ "hle", "off" },
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{ "rtm", "off" },
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/* spec-ctrl was already enabled by -v3 above */
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{ "model-id",
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"Intel Core Processor (Broadwell, no TSX, IBRS)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Broadwell-IBRS",
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@ -2465,6 +2606,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Core Processor (Skylake)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Skylake-Client-IBRS */
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.props = (PropValue[]) {
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Core Processor (Skylake, IBRS)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Skylake-Client-IBRS",
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@ -2567,6 +2722,23 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Xeon Processor (Skylake)",
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to Skylake-Server-IBRS */
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.props = (PropValue[]) {
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/* clflushopt was not added to Skylake-Server-IBRS */
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/* TODO: add -v3 including clflushopt */
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{ "clflushopt", "off" },
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{ "spec-ctrl", "on" },
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{ "model-id",
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"Intel Xeon Processor (Skylake, IBRS)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "Skylake-Server-IBRS",
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@ -3082,6 +3254,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x8000001E,
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.model_id = "AMD EPYC Processor",
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.cache_info = &epyc_cache_info,
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.versions = (X86CPUVersionDefinition[]) {
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{ .version = 1 },
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{
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.version = 2,
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/* Equivalent to EPYC-IBPB */
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.props = (PropValue[]) {
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{ "ibpb", "on" },
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{ "model-id",
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"AMD EPYC Processor (with IBPB)" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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{
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.name = "EPYC-IBPB",
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