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target/sparc: Drop free_compare 

Translators are no longer required to free tcg temporaries.
Remove the g1 and g2 members of DisasCompare, as they were
used to track which temps needed to be freed.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-24 21:32:54 -10:00
parent a6ca81cb2a
commit d8e1ce0314
1 changed files with 0 additions and 32 deletions
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32
target/sparc/translate.c
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@ -93,7 +93,6 @@ typedef struct DisasContext {
typedef struct {
TCGCond cond;
bool is_bool;
bool g1, g2;
TCGv c1, c2;
} DisasCompare;
@ -1066,16 +1065,6 @@ static inline void gen_op_next_insn(void)
tcg_gen_addi_tl(cpu_npc, cpu_npc, 4);
}
static void free_compare(DisasCompare *cmp)
{
if (!cmp->g1) {
tcg_temp_free(cmp->c1);
}
if (!cmp->g2) {
tcg_temp_free(cmp->c2);
}
}
static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
DisasContext *dc)
{
@ -1135,17 +1124,14 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
cmp->cond = logic_cond[cond];
do_compare_dst_0:
cmp->is_bool = false;
cmp->g2 = false;
cmp->c2 = tcg_const_tl(0);
#ifdef TARGET_SPARC64
if (!xcc) {
cmp->g1 = false;
cmp->c1 = tcg_temp_new();
tcg_gen_ext32s_tl(cmp->c1, cpu_cc_dst);
break;
}
#endif
cmp->g1 = true;
cmp->c1 = cpu_cc_dst;
break;
@ -1167,7 +1153,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
if (!xcc) {
/* Note that sign-extension works for unsigned compares as
long as both operands are sign-extended. */
cmp->g1 = cmp->g2 = false;
cmp->c1 = tcg_temp_new();
cmp->c2 = tcg_temp_new();
tcg_gen_ext32s_tl(cmp->c1, cpu_cc_src);
@ -1175,7 +1160,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
break;
}
#endif
cmp->g1 = cmp->g2 = true;
cmp->c1 = cpu_cc_src;
cmp->c2 = cpu_cc_src2;
break;
@ -1192,7 +1176,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
/* We're going to generate a boolean result. */
cmp->cond = TCG_COND_NE;
cmp->is_bool = true;
cmp->g1 = cmp->g2 = false;
cmp->c1 = r_dst = tcg_temp_new();
cmp->c2 = tcg_const_tl(0);
@ -1258,7 +1241,6 @@ static void gen_fcompare(DisasCompare *cmp, unsigned int cc, unsigned int cond)
/* For now we still generate a straight boolean result. */
cmp->cond = TCG_COND_NE;
cmp->is_bool = true;
cmp->g1 = cmp->g2 = false;
cmp->c1 = r_dst = tcg_temp_new();
cmp->c2 = tcg_const_tl(0);
@ -1342,8 +1324,6 @@ static void gen_cond(TCGv r_dst, unsigned int cc, unsigned int cond,
} else {
tcg_gen_setcond_tl(cmp.cond, r_dst, cmp.c1, cmp.c2);
}
free_compare(&cmp);
}
static void gen_fcond(TCGv r_dst, unsigned int cc, unsigned int cond)
@ -1357,8 +1337,6 @@ static void gen_fcond(TCGv r_dst, unsigned int cc, unsigned int cond)
} else {
tcg_gen_setcond_tl(cmp.cond, r_dst, cmp.c1, cmp.c2);
}
free_compare(&cmp);
}
#ifdef TARGET_SPARC64
@ -1378,8 +1356,6 @@ static void gen_compare_reg(DisasCompare *cmp, int cond, TCGv r_src)
{
cmp->cond = tcg_invert_cond(gen_tcg_cond_reg[cond]);
cmp->is_bool = false;
cmp->g1 = true;
cmp->g2 = false;
cmp->c1 = r_src;
cmp->c2 = tcg_const_tl(0);
}
@ -1391,8 +1367,6 @@ static inline void gen_cond_reg(TCGv r_dst, int cond, TCGv r_src)
/* The interface is to return a boolean in r_dst. */
tcg_gen_setcond_tl(cmp.cond, r_dst, cmp.c1, cmp.c2);
free_compare(&cmp);
}
#endif
@ -3268,7 +3242,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
l1 = gen_new_label();
tcg_gen_brcond_tl(tcg_invert_cond(cmp.cond),
cmp.c1, cmp.c2, l1);
free_compare(&cmp);
}
mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc)
@ -3827,7 +3800,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
cpu_src1 = get_src1(dc, insn); \
gen_compare_reg(&cmp, cond, cpu_src1); \
gen_fmov##sz(dc, &cmp, rd, rs2); \
free_compare(&cmp); \
} while (0)
if ((xop & 0x11f) == 0x005) { /* V9 fmovsr */
@ -3851,7 +3823,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
cond = GET_FIELD_SP(insn, 14, 17); \
gen_fcompare(&cmp, fcc, cond); \
gen_fmov##sz(dc, &cmp, rd, rs2); \
free_compare(&cmp); \
} while (0)
case 0x001: /* V9 fmovscc %fcc0 */
@ -3901,7 +3872,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
cond = GET_FIELD_SP(insn, 14, 17); \
gen_compare(&cmp, xcc, cond, dc); \
gen_fmov##sz(dc, &cmp, rd, rs2); \
free_compare(&cmp); \
} while (0)
case 0x101: /* V9 fmovscc %icc */
@ -4713,7 +4683,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
tcg_gen_movcond_tl(cmp.cond, dst,
cmp.c1, cmp.c2,
cpu_src2, dst);
free_compare(&cmp);
gen_store_gpr(dc, rd, dst);
break;
}
@ -4745,7 +4714,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
tcg_gen_movcond_tl(cmp.cond, dst,
cmp.c1, cmp.c2,
cpu_src2, dst);
free_compare(&cmp);
gen_store_gpr(dc, rd, dst);
break;
}