ppc/xive: Implement TM_PULL_OS_CTX special command
When a vCPU is not dispatched anymore on a HW thread, the Hypervisor (KVM on Linux) invalidates the OS interrupt context of a vCPU with this special command. It returns the OS CAM line value and resets the VO bit. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190718115420.19919-4-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -337,6 +337,17 @@ static void xive_tm_set_os_pending(XiveTCTX *tctx, hwaddr offset,
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xive_tctx_notify(tctx, TM_QW1_OS);
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}
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static uint64_t xive_tm_pull_os_ctx(XiveTCTX *tctx, hwaddr offset,
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unsigned size)
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{
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uint32_t qw1w2_prev = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);
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uint32_t qw1w2;
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qw1w2 = xive_set_field32(TM_QW1W2_VO, qw1w2_prev, 0);
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memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4);
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return qw1w2;
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}
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/*
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* Define a mapping of "special" operations depending on the TIMA page
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* offset and the size of the operation.
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@ -363,6 +374,8 @@ static const XiveTmOp xive_tm_operations[] = {
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/* MMIOs above 2K : special operations with side effects */
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{ XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
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{ XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
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{ XIVE_TM_HV_PAGE, TM_SPC_PULL_OS_CTX, 4, NULL, xive_tm_pull_os_ctx },
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{ XIVE_TM_HV_PAGE, TM_SPC_PULL_OS_CTX, 8, NULL, xive_tm_pull_os_ctx },
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{ XIVE_TM_HV_PAGE, TM_SPC_ACK_HV_REG, 2, NULL, xive_tm_ack_hv_reg },
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{ XIVE_TM_HV_PAGE, TM_SPC_PULL_POOL_CTX, 4, NULL, xive_tm_pull_pool_ctx },
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{ XIVE_TM_HV_PAGE, TM_SPC_PULL_POOL_CTX, 8, NULL, xive_tm_pull_pool_ctx },
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@ -406,7 +419,7 @@ void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value,
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if (offset & 0x800) {
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xto = xive_tm_find_op(offset, size, true);
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if (!xto) {
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qemu_log_mask(LOG_GUEST_ERROR, "XIVE: invalid write access at TIMA"
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qemu_log_mask(LOG_GUEST_ERROR, "XIVE: invalid write access at TIMA "
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"@%"HWADDR_PRIx"\n", offset);
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} else {
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xto->write_handler(tctx, offset, value, size);
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