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ARM TCG conversion 8/16.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4145 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-03-31 03:46:50 +00:00
parent 6ddbc6e4cf
commit d9ba48308d
4 changed files with 413 additions and 375 deletions
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38
target-arm/helpers.h
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@ -1,6 +1,30 @@
#define DEF_HELPER(name, ret, args) ret glue(helper_,name) args;
#ifdef GEN_HELPER
#define DEF_HELPER_0_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(void) \
{ \
tcg_gen_helper_0_0(helper_##name); \
}
#define DEF_HELPER_0_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1) \
{ \
tcg_gen_helper_0_1(helper_##name, arg1); \
}
#define DEF_HELPER_0_2(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_0_2(helper_##name, arg1, arg2); \
}
#define DEF_HELPER_1_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret) \
{ \
tcg_gen_helper_1_0(helper_##name, ret); \
}
#define DEF_HELPER_1_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, TCGv arg1) \
@ -21,6 +45,10 @@ static inline void gen_helper_##name(TCGv ret, \
tcg_gen_helper_1_3(helper_##name, ret, arg1, arg2, arg3); \
}
#else /* !GEN_HELPER */
#define DEF_HELPER_0_0 DEF_HELPER
#define DEF_HELPER_0_1 DEF_HELPER
#define DEF_HELPER_0_2 DEF_HELPER
#define DEF_HELPER_1_0 DEF_HELPER
#define DEF_HELPER_1_1 DEF_HELPER
#define DEF_HELPER_1_2 DEF_HELPER
#define DEF_HELPER_1_3 DEF_HELPER
@ -74,8 +102,18 @@ DEF_HELPER_1_2(usat16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(usad8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_3(sel_flags, uint32_t, (uint32_t, uint32_t, uint32_t))
DEF_HELPER_0_1(exception, void, (uint32_t))
DEF_HELPER_0_0(wfi, void, (void))
DEF_HELPER_0_2(cpsr_write, void, (uint32_t, uint32_t))
DEF_HELPER_1_0(cpsr_read, uint32_t, (void))
#undef DEF_HELPER
#undef DEF_HELPER_0_0
#undef DEF_HELPER_0_1
#undef DEF_HELPER_0_2
#undef DEF_HELPER_1_0
#undef DEF_HELPER_1_1
#undef DEF_HELPER_1_2
#undef DEF_HELPER_1_3
#undef GEN_HELPER

184
target-arm/op.c
View File

@ -80,151 +80,6 @@ OPSUB(sub, sbc, T0, T0, T1)
OPSUB(rsb, rsc, T0, T1, T0)
#define EIP (env->regs[15])
void OPPROTO op_test_eq(void)
{
if (env->NZF == 0)
GOTO_LABEL_PARAM(1);;
FORCE_RET();
}
void OPPROTO op_test_ne(void)
{
if (env->NZF != 0)
GOTO_LABEL_PARAM(1);;
FORCE_RET();
}
void OPPROTO op_test_cs(void)
{
if (env->CF != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_cc(void)
{
if (env->CF == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_mi(void)
{
if ((env->NZF & 0x80000000) != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_pl(void)
{
if ((env->NZF & 0x80000000) == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_vs(void)
{
if ((env->VF & 0x80000000) != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_vc(void)
{
if ((env->VF & 0x80000000) == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_hi(void)
{
if (env->CF != 0 && env->NZF != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_ls(void)
{
if (env->CF == 0 || env->NZF == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_ge(void)
{
if (((env->VF ^ env->NZF) & 0x80000000) == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_lt(void)
{
if (((env->VF ^ env->NZF) & 0x80000000) != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_gt(void)
{
if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_le(void)
{
if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_test_T0(void)
{
if (T0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_testn_T0(void)
{
if (!T0)
GOTO_LABEL_PARAM(1);
FORCE_RET();
}
void OPPROTO op_movl_T0_cpsr(void)
{
/* Execution state bits always read as zero. */
T0 = cpsr_read(env) & ~CPSR_EXEC;
FORCE_RET();
}
void OPPROTO op_movl_T0_spsr(void)
{
T0 = env->spsr;
}
void OPPROTO op_movl_spsr_T0(void)
{
uint32_t mask = PARAM1;
env->spsr = (env->spsr & ~mask) | (T0 & mask);
}
void OPPROTO op_movl_cpsr_T0(void)
{
cpsr_write(env, T0, PARAM1);
FORCE_RET();
}
/* 48 bit signed mul, top 32 bits */
void OPPROTO op_imulw_T0_T1(void)
{
uint64_t res;
res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
T0 = res >> 16;
}
void OPPROTO op_addq_T0_T1(void)
{
uint64_t res;
@ -397,45 +252,6 @@ void OPPROTO op_rorl_T1_T0_cc(void)
FORCE_RET();
}
/* exceptions */
void OPPROTO op_swi(void)
{
env->exception_index = EXCP_SWI;
cpu_loop_exit();
}
void OPPROTO op_undef_insn(void)
{
env->exception_index = EXCP_UDEF;
cpu_loop_exit();
}
void OPPROTO op_debug(void)
{
env->exception_index = EXCP_DEBUG;
cpu_loop_exit();
}
void OPPROTO op_wfi(void)
{
env->exception_index = EXCP_HLT;
env->halted = 1;
cpu_loop_exit();
}
void OPPROTO op_bkpt(void)
{
env->exception_index = EXCP_BKPT;
cpu_loop_exit();
}
void OPPROTO op_exception_exit(void)
{
env->exception_index = EXCP_EXCEPTION_EXIT;
cpu_loop_exit();
}
/* VFP support. We follow the convention used for VFP instrunctions:
Single precition routines have a "s" suffix, double precision a
"d" suffix. */

23
target-arm/op_helper.c
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@ -436,3 +436,26 @@ uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
res |= do_usat(((int32_t)x) >> 16, shift) << 16;
return res;
}
void HELPER(wfi)(void)
{
env->exception_index = EXCP_HLT;
env->halted = 1;
cpu_loop_exit();
}
void HELPER(exception)(uint32_t excp)
{
env->exception_index = excp;
cpu_loop_exit();
}
uint32_t HELPER(cpsr_read)(void)
{
return cpsr_read(env) & ~CPSR_EXEC;
}
void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
{
cpsr_write(env, val, mask);
}

543
target-arm/translate.c
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