PREP machines have two IO mappings.
This patch adds support for non-contiguous IO map, which is used by OS/2. It also adds the missing legacy IO ports for the PREP PCI bridge and changes CPU PVR from 74x/75x to 604 to make OS/2 happy. (Jocelyn Mayer) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1381 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
dccfafc4e1
commit
da9b266bb8
10
hw/pci.c
10
hw/pci.c
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@ -694,6 +694,16 @@ PCIBus *pci_prep_init(void)
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s = pci_register_bus();
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s->set_irq = prep_set_irq;
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register_ioport_write(0xcf8, 4, 4, pci_addr_writel, s);
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register_ioport_read(0xcf8, 4, 4, pci_addr_readl, s);
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register_ioport_write(0xcfc, 4, 1, pci_data_writeb, s);
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register_ioport_write(0xcfc, 4, 2, pci_data_writew, s);
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register_ioport_write(0xcfc, 4, 4, pci_data_writel, s);
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register_ioport_read(0xcfc, 4, 1, pci_data_readb, s);
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register_ioport_read(0xcfc, 4, 2, pci_data_readw, s);
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register_ioport_read(0xcfc, 4, 4, pci_data_readl, s);
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PPC_io_memory = cpu_register_io_memory(0, PPC_PCIIO_read,
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PPC_PCIIO_write, s);
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cpu_register_physical_memory(0x80800000, 0x00400000, PPC_io_memory);
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125
hw/ppc_prep.c
125
hw/ppc_prep.c
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@ -249,6 +249,7 @@ typedef struct sysctrl_t {
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uint8_t state;
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uint8_t syscontrol;
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uint8_t fake_io[2];
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int contiguous_map;
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} sysctrl_t;
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enum {
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@ -328,10 +329,7 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val)
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break;
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case 0x0850:
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/* I/O map type register */
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if (!(val & 0x01)) {
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printf("No support for non-continuous I/O map mode\n");
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abort();
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}
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sysctrl->contiguous_map = val & 0x01;
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break;
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default:
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printf("ERROR: unaffected IO port write: %04lx => %02x\n",
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@ -375,6 +373,9 @@ static uint32_t PREP_io_800_readb (void *opaque, uint32_t addr)
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/* Motorola base module extended feature register */
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retval = 0x39; /* No USB, CF and PCI bridge. NVRAM present */
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break;
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case 0x0814:
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/* L2 invalidate: don't care */
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break;
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case 0x0818:
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/* Keylock */
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retval = 0x00;
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@ -391,7 +392,7 @@ static uint32_t PREP_io_800_readb (void *opaque, uint32_t addr)
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break;
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case 0x0850:
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/* I/O map type register */
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retval = 0x01;
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retval = sysctrl->contiguous_map;
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break;
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default:
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printf("ERROR: unaffected IO port: %04lx read\n", (long)addr);
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@ -402,6 +403,108 @@ static uint32_t PREP_io_800_readb (void *opaque, uint32_t addr)
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return retval;
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}
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static inline target_phys_addr_t prep_IO_address (sysctrl_t *sysctrl,
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target_phys_addr_t addr)
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{
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if (sysctrl->contiguous_map == 0) {
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/* 64 KB contiguous space for IOs */
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addr &= 0xFFFF;
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} else {
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/* 8 MB non-contiguous space for IOs */
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addr = (addr & 0x1F) | ((addr & 0x007FFF000) >> 7);
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}
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return addr;
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}
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static void PPC_prep_io_writeb (void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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sysctrl_t *sysctrl = opaque;
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addr = prep_IO_address(sysctrl, addr);
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cpu_outb(NULL, addr, value);
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}
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static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
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{
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sysctrl_t *sysctrl = opaque;
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uint32_t ret;
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addr = prep_IO_address(sysctrl, addr);
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ret = cpu_inb(NULL, addr);
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return ret;
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}
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static void PPC_prep_io_writew (void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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sysctrl_t *sysctrl = opaque;
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addr = prep_IO_address(sysctrl, addr);
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#ifdef TARGET_WORDS_BIGENDIAN
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value = bswap16(value);
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#endif
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PPC_IO_DPRINTF("0x%08lx => 0x%08x\n", (long)addr, value);
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cpu_outw(NULL, addr, value);
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}
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static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
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{
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sysctrl_t *sysctrl = opaque;
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uint32_t ret;
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addr = prep_IO_address(sysctrl, addr);
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ret = cpu_inw(NULL, addr);
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#ifdef TARGET_WORDS_BIGENDIAN
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ret = bswap16(ret);
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#endif
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PPC_IO_DPRINTF("0x%08lx <= 0x%08x\n", (long)addr, ret);
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return ret;
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}
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static void PPC_prep_io_writel (void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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sysctrl_t *sysctrl = opaque;
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addr = prep_IO_address(sysctrl, addr);
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#ifdef TARGET_WORDS_BIGENDIAN
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value = bswap32(value);
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#endif
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PPC_IO_DPRINTF("0x%08lx => 0x%08x\n", (long)addr, value);
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cpu_outl(NULL, addr, value);
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}
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static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
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{
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sysctrl_t *sysctrl = opaque;
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uint32_t ret;
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addr = prep_IO_address(sysctrl, addr);
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ret = cpu_inl(NULL, addr);
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#ifdef TARGET_WORDS_BIGENDIAN
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ret = bswap32(ret);
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#endif
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PPC_IO_DPRINTF("0x%08lx <= 0x%08x\n", (long)addr, ret);
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return ret;
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}
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CPUWriteMemoryFunc *PPC_prep_io_write[] = {
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&PPC_prep_io_writeb,
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&PPC_prep_io_writew,
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&PPC_prep_io_writel,
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};
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CPUReadMemoryFunc *PPC_prep_io_read[] = {
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&PPC_prep_io_readb,
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&PPC_prep_io_readw,
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&PPC_prep_io_readl,
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};
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extern CPUPPCState *global_env;
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#define NVRAM_SIZE 0x2000
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@ -472,16 +575,18 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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initrd_size = 0;
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}
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/* Register CPU as a 74x/75x */
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cpu_ppc_register(cpu_single_env, 0x00080000);
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/* Register CPU as a 604 */
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cpu_ppc_register(cpu_single_env, 0x00040000);
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/* Set time-base frequency to 100 Mhz */
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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isa_mem_base = 0xc0000000;
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pci_bus = pci_prep_init();
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/* Register 64 KB of ISA IO space */
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
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// pci_bus = i440fx_init();
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/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
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PPC_io_memory = cpu_register_io_memory(0, PPC_prep_io_read,
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PPC_prep_io_write, sysctrl);
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cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
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/* init basic PC hardware */
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vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
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