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target/sh4: Use env_cpu, env_archcpu 

Cleanup in the boilerplate that each target must define.
Replace sh_env_get_cpu with env_archcpu.  The combination
CPU(sh_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-03-22 19:26:42 -07:00
parent dc79e92869
commit dad1c8ecc7
4 changed files with 16 additions and 26 deletions
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2
linux-user/sh4/cpu_loop.c
View File

@ -23,7 +23,7 @@
void cpu_loop(CPUSH4State *env)
{
CPUState *cs = CPU(sh_env_get_cpu(env));
CPUState *cs = env_cpu(env);
int trapnr, ret;
target_siginfo_t info;

5
target/sh4/cpu.h
View File

@ -207,11 +207,6 @@ struct SuperHCPU {
CPUSH4State env;
};
static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
{
return container_of(env, SuperHCPU, env);
}
#define ENV_OFFSET offsetof(SuperHCPU, env)
void superh_cpu_do_interrupt(CPUState *cpu);

26
target/sh4/helper.c
View File

@ -216,8 +216,6 @@ static void update_itlb_use(CPUSH4State * env, int itlbnb)
static int itlb_replacement(CPUSH4State * env)
{
SuperHCPU *cpu = sh_env_get_cpu(env);
if ((env->mmucr & 0xe0000000) == 0xe0000000) {
return 0;
}
@ -230,7 +228,7 @@ static int itlb_replacement(CPUSH4State * env)
if ((env->mmucr & 0x2c000000) == 0x00000000) {
return 3;
}
cpu_abort(CPU(cpu), "Unhandled itlb_replacement");
cpu_abort(env_cpu(env), "Unhandled itlb_replacement");
}
/* Find the corresponding entry in the right TLB
@ -286,7 +284,7 @@ static int copy_utlb_entry_itlb(CPUSH4State *env, int utlb)
itlb = itlb_replacement(env);
ientry = &env->itlb[itlb];
if (ientry->v) {
tlb_flush_page(CPU(sh_env_get_cpu(env)), ientry->vpn << 10);
tlb_flush_page(env_cpu(env), ientry->vpn << 10);
}
*ientry = env->utlb[utlb];
update_itlb_use(env, itlb);
@ -448,14 +446,14 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
void cpu_load_tlb(CPUSH4State * env)
{
SuperHCPU *cpu = sh_env_get_cpu(env);
CPUState *cs = env_cpu(env);
int n = cpu_mmucr_urc(env->mmucr);
tlb_t * entry = &env->utlb[n];
if (entry->v) {
/* Overwriting valid entry in utlb. */
target_ulong address = entry->vpn << 10;
tlb_flush_page(CPU(cpu), address);
tlb_flush_page(cs, address);
}
/* Take values into cpu status from registers. */
@ -478,7 +476,7 @@ void cpu_load_tlb(CPUSH4State * env)
entry->size = 1024 * 1024; /* 1M */
break;
default:
cpu_abort(CPU(cpu), "Unhandled load_tlb");
cpu_abort(cs, "Unhandled load_tlb");
break;
}
entry->sh = (uint8_t)cpu_ptel_sh(env->ptel);
@ -505,7 +503,7 @@ void cpu_load_tlb(CPUSH4State * env)
entry->v = 0;
}
tlb_flush(CPU(sh_env_get_cpu(s)));
tlb_flush(env_cpu(s));
}
uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
@ -531,7 +529,7 @@ void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, hwaddr addr,
if (entry->v) {
/* Overwriting valid entry in itlb. */
target_ulong address = entry->vpn << 10;
tlb_flush_page(CPU(sh_env_get_cpu(s)), address);
tlb_flush_page(env_cpu(s), address);
}
entry->asid = asid;
entry->vpn = vpn;
@ -573,7 +571,7 @@ void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, hwaddr addr,
if (entry->v) {
/* Overwriting valid entry in utlb. */
target_ulong address = entry->vpn << 10;
tlb_flush_page(CPU(sh_env_get_cpu(s)), address);
tlb_flush_page(env_cpu(s), address);
}
entry->ppn = (mem_value & 0x1ffffc00) >> 10;
entry->v = (mem_value & 0x00000100) >> 8;
@ -626,7 +624,7 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwaddr addr,
if (entry->vpn == vpn
&& (!use_asid || entry->asid == asid || entry->sh)) {
if (utlb_match_entry) {
CPUState *cs = CPU(sh_env_get_cpu(s));
CPUState *cs = env_cpu(s);
/* Multiple TLB Exception */
cs->exception_index = 0x140;
@ -658,13 +656,13 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwaddr addr,
}
if (needs_tlb_flush) {
tlb_flush_page(CPU(sh_env_get_cpu(s)), vpn << 10);
tlb_flush_page(env_cpu(s), vpn << 10);
}
} else {
int index = (addr & 0x00003f00) >> 8;
tlb_t * entry = &s->utlb[index];
if (entry->v) {
CPUState *cs = CPU(sh_env_get_cpu(s));
CPUState *cs = env_cpu(s);
/* Overwriting valid entry in utlb. */
target_ulong address = entry->vpn << 10;
@ -719,7 +717,7 @@ void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, hwaddr addr,
if (entry->v) {
/* Overwriting valid entry in utlb. */
target_ulong address = entry->vpn << 10;
tlb_flush_page(CPU(sh_env_get_cpu(s)), address);
tlb_flush_page(env_cpu(s), address);
}
entry->ppn = (mem_value & 0x1ffffc00) >> 10;
entry->v = (mem_value & 0x00000100) >> 8;

9
target/sh4/op_helper.c
View File

@ -46,10 +46,7 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
void helper_ldtlb(CPUSH4State *env)
{
#ifdef CONFIG_USER_ONLY
SuperHCPU *cpu = sh_env_get_cpu(env);
/* XXXXX */
cpu_abort(CPU(cpu), "Unhandled ldtlb");
cpu_abort(env_cpu(env), "Unhandled ldtlb");
#else
cpu_load_tlb(env);
#endif
@ -58,7 +55,7 @@ void helper_ldtlb(CPUSH4State *env)
static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
uintptr_t retaddr)
{
CPUState *cs = CPU(sh_env_get_cpu(env));
CPUState *cs = env_cpu(env);
cs->exception_index = index;
cpu_loop_exit_restore(cs, retaddr);
@ -91,7 +88,7 @@ void helper_debug(CPUSH4State *env)
void helper_sleep(CPUSH4State *env)
{
CPUState *cs = CPU(sh_env_get_cpu(env));
CPUState *cs = env_cpu(env);
cs->halted = 1;
env->in_sleep = 1;