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target/mips: Fix handling of unaligned memory access for nanoMIPS ISA 

nanoMIPS ISA does not support unaligned memory access. Adjust
DisasContext's default_tcg_memop_mask to reflect this.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-6-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Dragan Mladjenovic 2022-05-04 13:04:01 +02:00 committed by Philippe Mathieu-Daudé
parent 14668cfaaf
commit db7596989a
1 changed files with 3 additions and 2 deletions
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5
target/mips/tcg/translate.c
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@ -16023,8 +16023,9 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
#else
ctx->mem_idx = hflags_mmu_index(ctx->hflags);
#endif
ctx->default_tcg_memop_mask = (ctx->insn_flags & (ISA_MIPS_R6 |
INSN_LOONGSON3A)) ? MO_UNALN : MO_ALIGN;
ctx->default_tcg_memop_mask = (!(ctx->insn_flags & ISA_NANOMIPS32) &&
(ctx->insn_flags & (ISA_MIPS_R6 |
INSN_LOONGSON3A))) ? MO_UNALN : MO_ALIGN;
/*
* Execute a branch and its delay slot as a single instruction.