target/mips: Fix handling of unaligned memory access for nanoMIPS ISA
nanoMIPS ISA does not support unaligned memory access. Adjust DisasContext's default_tcg_memop_mask to reflect this. Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com> Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220504110403.613168-6-stefan.pejic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -16023,8 +16023,9 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
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#else
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#else
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ctx->mem_idx = hflags_mmu_index(ctx->hflags);
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ctx->mem_idx = hflags_mmu_index(ctx->hflags);
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#endif
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#endif
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ctx->default_tcg_memop_mask = (ctx->insn_flags & (ISA_MIPS_R6 |
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ctx->default_tcg_memop_mask = (!(ctx->insn_flags & ISA_NANOMIPS32) &&
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INSN_LOONGSON3A)) ? MO_UNALN : MO_ALIGN;
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(ctx->insn_flags & (ISA_MIPS_R6 |
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INSN_LOONGSON3A))) ? MO_UNALN : MO_ALIGN;
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/*
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/*
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* Execute a branch and its delay slot as a single instruction.
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* Execute a branch and its delay slot as a single instruction.
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