Implement generic sub-page I/O based on earlier work by J. Mayer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2868 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
57074f98bb
commit
db7b5426a4
@ -858,6 +858,7 @@ extern uint8_t *phys_ram_dirty;
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exception, the write memory callback gets the ram offset instead of
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the physical address */
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#define IO_MEM_ROMD (1)
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#define IO_MEM_SUBPAGE (2)
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typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
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typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
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231
exec.c
231
exec.c
@ -48,6 +48,7 @@
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//#define DEBUG_TLB_CHECK
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//#define DEBUG_IOPORT
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//#define DEBUG_SUBPAGE
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#if !defined(CONFIG_USER_ONLY)
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/* TB consistency checks only implemented for usermode emulation. */
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@ -157,6 +158,14 @@ static int tlb_flush_count;
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static int tb_flush_count;
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static int tb_phys_invalidate_count;
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#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
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typedef struct subpage_t {
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target_phys_addr_t base;
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CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE];
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CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE];
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void *opaque[TARGET_PAGE_SIZE];
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} subpage_t;
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static void page_init(void)
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{
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/* NOTE: we can always suppose that qemu_host_page_size >=
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@ -1898,6 +1907,30 @@ static inline void tlb_set_dirty(CPUState *env,
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}
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#endif /* defined(CONFIG_USER_ONLY) */
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static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
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int memory);
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static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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int orig_memory);
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#define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \
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need_subpage) \
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do { \
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if (addr > start_addr) \
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start_addr2 = 0; \
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else { \
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start_addr2 = start_addr & ~TARGET_PAGE_MASK; \
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if (start_addr2 > 0) \
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need_subpage = 1; \
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} \
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\
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if (end_addr - addr > TARGET_PAGE_SIZE) \
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end_addr2 = TARGET_PAGE_SIZE - 1; \
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else { \
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end_addr2 = (start_addr + orig_size - 1) & ~TARGET_PAGE_MASK; \
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if (end_addr2 < TARGET_PAGE_SIZE - 1) \
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need_subpage = 1; \
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} \
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} while (0)
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/* register physical memory. 'size' must be a multiple of the target
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page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
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io memory page */
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@ -1908,15 +1941,56 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
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target_phys_addr_t addr, end_addr;
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PhysPageDesc *p;
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CPUState *env;
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unsigned long orig_size = size;
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void *subpage;
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end_addr = start_addr + (target_phys_addr_t)size;
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size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
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end_addr = start_addr + size;
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for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
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p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
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p->phys_offset = phys_offset;
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
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(phys_offset & IO_MEM_ROMD))
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phys_offset += TARGET_PAGE_SIZE;
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for(addr = start_addr; addr < end_addr; addr += TARGET_PAGE_SIZE) {
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p = phys_page_find(addr >> TARGET_PAGE_BITS);
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if (p && p->phys_offset != IO_MEM_UNASSIGNED) {
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unsigned long orig_memory = p->phys_offset;
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target_phys_addr_t start_addr2, end_addr2;
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int need_subpage = 0;
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CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2,
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need_subpage);
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if (need_subpage) {
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if (!(orig_memory & IO_MEM_SUBPAGE)) {
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subpage = subpage_init((addr & TARGET_PAGE_MASK),
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&p->phys_offset, orig_memory);
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} else {
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subpage = io_mem_opaque[(orig_memory & ~TARGET_PAGE_MASK)
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>> IO_MEM_SHIFT];
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}
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subpage_register(subpage, start_addr2, end_addr2, phys_offset);
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} else {
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p->phys_offset = phys_offset;
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
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(phys_offset & IO_MEM_ROMD))
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phys_offset += TARGET_PAGE_SIZE;
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}
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} else {
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p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
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p->phys_offset = phys_offset;
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
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(phys_offset & IO_MEM_ROMD))
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phys_offset += TARGET_PAGE_SIZE;
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else {
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target_phys_addr_t start_addr2, end_addr2;
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int need_subpage = 0;
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CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr,
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end_addr2, need_subpage);
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if (need_subpage) {
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subpage = subpage_init((addr & TARGET_PAGE_MASK),
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&p->phys_offset, IO_MEM_UNASSIGNED);
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subpage_register(subpage, start_addr2, end_addr2,
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phys_offset);
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}
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}
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}
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}
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/* since each CPU stores ram addresses in its TLB cache, we must
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@ -2158,6 +2232,149 @@ static CPUWriteMemoryFunc *watch_mem_write[3] = {
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};
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#endif
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static inline uint32_t subpage_readlen (subpage_t *mmio, target_phys_addr_t addr,
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unsigned int len)
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{
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CPUReadMemoryFunc **mem_read;
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uint32_t ret;
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unsigned int idx;
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idx = SUBPAGE_IDX(addr - mmio->base);
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#if defined(DEBUG_SUBPAGE)
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printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d\n", __func__,
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mmio, len, addr, idx);
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#endif
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mem_read = mmio->mem_read[idx];
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ret = (*mem_read[len])(mmio->opaque[idx], addr);
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return ret;
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}
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static inline void subpage_writelen (subpage_t *mmio, target_phys_addr_t addr,
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uint32_t value, unsigned int len)
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{
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CPUWriteMemoryFunc **mem_write;
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unsigned int idx;
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idx = SUBPAGE_IDX(addr - mmio->base);
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#if defined(DEBUG_SUBPAGE)
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printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d value %08x\n", __func__,
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mmio, len, addr, idx, value);
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#endif
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mem_write = mmio->mem_write[idx];
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(*mem_write[len])(mmio->opaque[idx], addr, value);
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}
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static uint32_t subpage_readb (void *opaque, target_phys_addr_t addr)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
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#endif
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return subpage_readlen(opaque, addr, 0);
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}
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static void subpage_writeb (void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value);
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#endif
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subpage_writelen(opaque, addr, value, 0);
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}
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static uint32_t subpage_readw (void *opaque, target_phys_addr_t addr)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
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#endif
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return subpage_readlen(opaque, addr, 1);
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}
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static void subpage_writew (void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value);
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#endif
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subpage_writelen(opaque, addr, value, 1);
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}
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static uint32_t subpage_readl (void *opaque, target_phys_addr_t addr)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
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#endif
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return subpage_readlen(opaque, addr, 2);
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}
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static void subpage_writel (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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#if defined(DEBUG_SUBPAGE)
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printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value);
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#endif
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subpage_writelen(opaque, addr, value, 2);
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}
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static CPUReadMemoryFunc *subpage_read[] = {
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&subpage_readb,
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&subpage_readw,
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&subpage_readl,
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};
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static CPUWriteMemoryFunc *subpage_write[] = {
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&subpage_writeb,
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&subpage_writew,
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&subpage_writel,
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};
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static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
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int memory)
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{
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int idx, eidx;
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if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
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return -1;
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idx = SUBPAGE_IDX(start);
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eidx = SUBPAGE_IDX(end);
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#if defined(DEBUG_SUBPAGE)
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printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %d\n", __func__,
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mmio, start, end, idx, eidx, memory);
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#endif
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memory >>= IO_MEM_SHIFT;
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for (; idx <= eidx; idx++) {
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mmio->mem_read[idx] = io_mem_read[memory];
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mmio->mem_write[idx] = io_mem_write[memory];
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mmio->opaque[idx] = io_mem_opaque[memory];
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}
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return 0;
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}
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static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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int orig_memory)
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{
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subpage_t *mmio;
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int subpage_memory;
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mmio = qemu_mallocz(sizeof(subpage_t));
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if (mmio != NULL) {
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mmio->base = base;
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subpage_memory = cpu_register_io_memory(0, subpage_read, subpage_write, mmio);
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#if defined(DEBUG_SUBPAGE)
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printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,
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mmio, base, TARGET_PAGE_SIZE, subpage_memory);
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#endif
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*phys = subpage_memory | IO_MEM_SUBPAGE;
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subpage_register(mmio, 0, TARGET_PAGE_SIZE - 1, orig_memory);
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}
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return mmio;
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}
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static void io_mem_init(void)
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{
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cpu_register_io_memory(IO_MEM_ROM >> IO_MEM_SHIFT, error_mem_read, unassigned_mem_write, NULL);
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