hw/audio/ac97: Remove unneeded local variables
Several functions have a local variable that is just a copy of one of the function parameters. This is unneeded complication so just get rid of these. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <d959aa0b267eb139a994e41ca0b7ba87d9cef7a9.1650706617.git.balaton@eik.bme.hu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
BALATON Zoltan
Paolo Bonzini
parent
dafea9e286
commit
dba2b2941c
102
hw/audio/ac97.c
102
hw/audio/ac97.c
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@ -557,9 +557,8 @@ static uint32_t nam_readb(void *opaque, uint32_t addr)
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static uint32_t nam_readw(void *opaque, uint32_t addr)
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{
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AC97LinkState *s = opaque;
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uint32_t index = addr;
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s->cas = 0;
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return mixer_load(s, index);
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return mixer_load(s, addr);
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}
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static uint32_t nam_readl(void *opaque, uint32_t addr)
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@ -584,21 +583,21 @@ static void nam_writeb(void *opaque, uint32_t addr, uint32_t val)
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static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
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{
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AC97LinkState *s = opaque;
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uint32_t index = addr;
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s->cas = 0;
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switch (index) {
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switch (addr) {
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case AC97_Reset:
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mixer_reset(s);
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break;
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case AC97_Powerdown_Ctrl_Stat:
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val &= ~0x800f;
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val |= mixer_load(s, index) & 0xf;
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mixer_store(s, index, val);
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val |= mixer_load(s, addr) & 0xf;
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mixer_store(s, addr, val);
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break;
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case AC97_PCM_Out_Volume_Mute:
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case AC97_Master_Volume_Mute:
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case AC97_Record_Gain_Mute:
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set_volume(s, index, val);
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set_volume(s, addr, val);
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break;
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case AC97_Record_Select:
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record_select(s, val);
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@ -626,7 +625,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
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break;
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case AC97_PCM_Front_DAC_Rate:
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if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
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mixer_store(s, index, val);
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mixer_store(s, addr, val);
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dolog("Set front DAC rate to %d\n", val);
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open_voice(s, PO_INDEX, val);
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} else {
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@ -636,7 +635,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
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break;
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case AC97_MIC_ADC_Rate:
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if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
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mixer_store(s, index, val);
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mixer_store(s, addr, val);
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dolog("Set MIC ADC rate to %d\n", val);
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open_voice(s, MC_INDEX, val);
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} else {
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@ -646,7 +645,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
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break;
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case AC97_PCM_LR_ADC_Rate:
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if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
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mixer_store(s, index, val);
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mixer_store(s, addr, val);
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dolog("Set front LR ADC rate to %d\n", val);
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open_voice(s, PI_INDEX, val);
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} else {
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@ -673,7 +672,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
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break;
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default:
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dolog("U nam writew 0x%x <- 0x%x\n", addr, val);
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mixer_store(s, index, val);
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mixer_store(s, addr, val);
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break;
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}
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}
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@ -693,10 +692,9 @@ static uint32_t nabm_readb(void *opaque, uint32_t addr)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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uint32_t val = ~0U;
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switch (index) {
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switch (addr) {
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case CAS:
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dolog("CAS %d\n", s->cas);
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val = s->cas;
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@ -705,37 +703,37 @@ static uint32_t nabm_readb(void *opaque, uint32_t addr)
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case PI_CIV:
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case PO_CIV:
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case MC_CIV:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->civ;
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dolog("CIV[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("CIV[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_LVI:
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case PO_LVI:
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case MC_LVI:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->lvi;
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dolog("LVI[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("LVI[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_PIV:
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case PO_PIV:
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case MC_PIV:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->piv;
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dolog("PIV[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("PIV[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_CR:
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case PO_CR:
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case MC_CR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->cr;
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dolog("CR[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("CR[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_SR:
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case PO_SR:
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case MC_SR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->sr & 0xff;
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dolog("SRb[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("SRb[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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default:
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dolog("U nabm readb 0x%x -> 0x%x\n", addr, val);
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@ -748,23 +746,22 @@ static uint32_t nabm_readw(void *opaque, uint32_t addr)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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uint32_t val = ~0U;
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switch (index) {
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switch (addr) {
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case PI_SR:
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case PO_SR:
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case MC_SR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->sr;
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dolog("SR[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("SR[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_PICB:
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case PO_PICB:
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case MC_PICB:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->picb;
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dolog("PICB[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("PICB[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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default:
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dolog("U nabm readw 0x%x -> 0x%x\n", addr, val);
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@ -777,31 +774,30 @@ static uint32_t nabm_readl(void *opaque, uint32_t addr)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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uint32_t val = ~0U;
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switch (index) {
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switch (addr) {
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case PI_BDBAR:
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case PO_BDBAR:
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case MC_BDBAR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->bdbar;
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dolog("BMADDR[%d] -> 0x%x\n", GET_BM(index), val);
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dolog("BMADDR[%d] -> 0x%x\n", GET_BM(addr), val);
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break;
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case PI_CIV:
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case PO_CIV:
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case MC_CIV:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->civ | (r->lvi << 8) | (r->sr << 16);
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dolog("CIV LVI SR[%d] -> 0x%x, 0x%x, 0x%x\n", GET_BM(index),
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dolog("CIV LVI SR[%d] -> 0x%x, 0x%x, 0x%x\n", GET_BM(addr),
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r->civ, r->lvi, r->sr);
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break;
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case PI_PICB:
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case PO_PICB:
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case MC_PICB:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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val = r->picb | (r->piv << 16) | (r->cr << 24);
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dolog("PICB PIV CR[%d] -> 0x%x 0x%x 0x%x 0x%x\n", GET_BM(index),
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dolog("PICB PIV CR[%d] -> 0x%x 0x%x 0x%x 0x%x\n", GET_BM(addr),
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val, r->picb, r->piv, r->cr);
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break;
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case GLOB_CNT:
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@ -827,12 +823,12 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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switch (index) {
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switch (addr) {
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case PI_LVI:
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case PO_LVI:
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case MC_LVI:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
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r->sr &= ~(SR_DCH | SR_CELV);
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r->civ = r->piv;
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@ -840,12 +836,12 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
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fetch_bd(s, r);
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}
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r->lvi = val % 32;
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dolog("LVI[%d] <- 0x%x\n", GET_BM(index), val);
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dolog("LVI[%d] <- 0x%x\n", GET_BM(addr), val);
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break;
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case PI_CR:
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case PO_CR:
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case MC_CR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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if (val & CR_RR) {
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reset_bm_regs(s, r);
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} else {
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@ -861,15 +857,15 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
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voice_set_active(s, r - s->bm_regs, 1);
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}
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}
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dolog("CR[%d] <- 0x%x (cr 0x%x)\n", GET_BM(index), val, r->cr);
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dolog("CR[%d] <- 0x%x (cr 0x%x)\n", GET_BM(addr), val, r->cr);
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break;
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case PI_SR:
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case PO_SR:
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case MC_SR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
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update_sr(s, r, r->sr & ~(val & SR_WCLEAR_MASK));
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dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(index), val, r->sr);
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dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr), val, r->sr);
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break;
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default:
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dolog("U nabm writeb 0x%x <- 0x%x\n", addr, val);
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@ -881,15 +877,15 @@ static void nabm_writew(void *opaque, uint32_t addr, uint32_t val)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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switch (index) {
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switch (addr) {
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case PI_SR:
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case PO_SR:
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case MC_SR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
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update_sr(s, r, r->sr & ~(val & SR_WCLEAR_MASK));
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dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(index), val, r->sr);
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dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr), val, r->sr);
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break;
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default:
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dolog("U nabm writew 0x%x <- 0x%x\n", addr, val);
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@ -901,14 +897,14 @@ static void nabm_writel(void *opaque, uint32_t addr, uint32_t val)
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{
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AC97LinkState *s = opaque;
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AC97BusMasterRegs *r = NULL;
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uint32_t index = addr;
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switch (index) {
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switch (addr) {
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case PI_BDBAR:
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case PO_BDBAR:
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case MC_BDBAR:
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r = &s->bm_regs[GET_BM(index)];
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r = &s->bm_regs[GET_BM(addr)];
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r->bdbar = val & ~3;
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dolog("BDBAR[%d] <- 0x%x (bdbar 0x%x)\n", GET_BM(index), val, r->bdbar);
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dolog("BDBAR[%d] <- 0x%x (bdbar 0x%x)\n", GET_BM(addr), val, r->bdbar);
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break;
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case GLOB_CNT:
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/* TODO: Handle WR or CR being set (warm/cold reset requests) */
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