Implement time-base start/stop helpers.
Implement PowerPC 6xx time-base enable input pin. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3394 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer
parent
d68f13063b
commit
dbdd25065e
121
hw/ppc.c
121
hw/ppc.c
@ -30,6 +30,9 @@
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extern FILE *logfile;
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extern int loglevel;
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static void cpu_ppc_tb_stop (CPUState *env);
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static void cpu_ppc_tb_start (CPUState *env);
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static void ppc_set_irq (CPUState *env, int n_IRQ, int level)
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{
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if (level) {
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@ -65,6 +68,19 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
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/* Don't generate spurious events */
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if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) {
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switch (pin) {
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case PPC6xx_INPUT_TBEN:
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/* Level sensitive - active high */
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#if defined(PPC_DEBUG_IRQ)
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if (loglevel & CPU_LOG_INT) {
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fprintf(logfile, "%s: %s the time base\n",
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__func__, level ? "start" : "stop");
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}
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#endif
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if (level) {
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cpu_ppc_tb_start(env);
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} else {
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cpu_ppc_tb_stop(env);
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}
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case PPC6xx_INPUT_INT:
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/* Level sensitive - active high */
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#if defined(PPC_DEBUG_IRQ)
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@ -402,11 +418,12 @@ void ppc40x_irq_init (CPUState *env)
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/* PowerPC time base and decrementer emulation */
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struct ppc_tb_t {
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/* Time base management */
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int64_t tb_offset; /* Compensation */
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int64_t atb_offset; /* Compensation */
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uint32_t tb_freq; /* TB frequency */
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int64_t tb_offset; /* Compensation */
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int64_t atb_offset; /* Compensation */
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uint32_t tb_freq; /* TB frequency */
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/* Decrementer management */
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uint64_t decr_next; /* Tick for next decr interrupt */
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uint64_t decr_next; /* Tick for next decr interrupt */
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uint32_t decr_freq; /* decrementer frequency */
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struct QEMUTimer *decr_timer;
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#if defined(TARGET_PPC64H)
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/* Hypervisor decrementer management */
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@ -418,12 +435,11 @@ struct ppc_tb_t {
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void *opaque;
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};
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static always_inline uint64_t cpu_ppc_get_tb (ppc_tb_t *tb_env,
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static always_inline uint64_t cpu_ppc_get_tb (ppc_tb_t *tb_env, uint64_t vmclk,
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int64_t tb_offset)
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{
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/* TB time in tb periods */
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return muldiv64(qemu_get_clock(vm_clock) + tb_env->tb_offset,
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tb_env->tb_freq, ticks_per_sec);
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return muldiv64(vmclk, tb_env->tb_freq, ticks_per_sec) + tb_offset;
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}
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uint32_t cpu_ppc_load_tbl (CPUState *env)
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@ -431,7 +447,7 @@ uint32_t cpu_ppc_load_tbl (CPUState *env)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->tb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
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#if defined(PPC_DEBUG_TB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
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@ -446,7 +462,7 @@ static always_inline uint32_t _cpu_ppc_load_tbu (CPUState *env)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->tb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
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#if defined(PPC_DEBUG_TB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
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@ -461,12 +477,11 @@ uint32_t cpu_ppc_load_tbu (CPUState *env)
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return _cpu_ppc_load_tbu(env);
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}
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static always_inline void cpu_ppc_store_tb (ppc_tb_t *tb_env,
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static always_inline void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t vmclk,
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int64_t *tb_offsetp,
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uint64_t value)
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{
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*tb_offsetp = muldiv64(value, ticks_per_sec, tb_env->tb_freq)
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- qemu_get_clock(vm_clock);
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*tb_offsetp = value - muldiv64(vmclk, tb_env->tb_freq, ticks_per_sec);
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#ifdef PPC_DEBUG_TB
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if (loglevel != 0) {
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fprintf(logfile, "%s: tb=0x%016lx offset=%08lx\n", __func__, value,
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@ -480,9 +495,10 @@ void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->tb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
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tb &= 0xFFFFFFFF00000000ULL;
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cpu_ppc_store_tb(tb_env, &tb_env->tb_offset, tb | (uint64_t)value);
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cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
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&tb_env->tb_offset, tb | (uint64_t)value);
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}
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static always_inline void _cpu_ppc_store_tbu (CPUState *env, uint32_t value)
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@ -490,10 +506,10 @@ static always_inline void _cpu_ppc_store_tbu (CPUState *env, uint32_t value)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->tb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
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tb &= 0x00000000FFFFFFFFULL;
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cpu_ppc_store_tb(tb_env, &tb_env->tb_offset,
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((uint64_t)value << 32) | tb);
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cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
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&tb_env->tb_offset, ((uint64_t)value << 32) | tb);
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}
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void cpu_ppc_store_tbu (CPUState *env, uint32_t value)
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@ -506,7 +522,7 @@ uint32_t cpu_ppc_load_atbl (CPUState *env)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->atb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
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#if defined(PPC_DEBUG_TB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
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@ -521,7 +537,7 @@ uint32_t cpu_ppc_load_atbu (CPUState *env)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->atb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
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#if defined(PPC_DEBUG_TB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
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@ -536,9 +552,10 @@ void cpu_ppc_store_atbl (CPUState *env, uint32_t value)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->atb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
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tb &= 0xFFFFFFFF00000000ULL;
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cpu_ppc_store_tb(tb_env, &tb_env->atb_offset, tb | (uint64_t)value);
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cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
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&tb_env->atb_offset, tb | (uint64_t)value);
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}
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void cpu_ppc_store_atbu (CPUState *env, uint32_t value)
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@ -546,10 +563,53 @@ void cpu_ppc_store_atbu (CPUState *env, uint32_t value)
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb;
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tb = cpu_ppc_get_tb(tb_env, tb_env->atb_offset);
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tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
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tb &= 0x00000000FFFFFFFFULL;
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cpu_ppc_store_tb(tb_env, &tb_env->atb_offset,
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((uint64_t)value << 32) | tb);
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cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
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&tb_env->atb_offset, ((uint64_t)value << 32) | tb);
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}
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static void cpu_ppc_tb_stop (CPUState *env)
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{
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb, atb, vmclk;
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/* If the time base is already frozen, do nothing */
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if (tb_env->tb_freq != 0) {
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vmclk = qemu_get_clock(vm_clock);
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/* Get the time base */
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tb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->tb_offset);
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/* Get the alternate time base */
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atb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->atb_offset);
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/* Store the time base value (ie compute the current offset) */
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cpu_ppc_store_tb(tb_env, vmclk, &tb_env->tb_offset, tb);
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/* Store the alternate time base value (compute the current offset) */
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cpu_ppc_store_tb(tb_env, vmclk, &tb_env->atb_offset, atb);
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/* Set the time base frequency to zero */
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tb_env->tb_freq = 0;
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/* Now, the time bases are frozen to tb_offset / atb_offset value */
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}
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}
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static void cpu_ppc_tb_start (CPUState *env)
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{
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t tb, atb, vmclk;
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/* If the time base is not frozen, do nothing */
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if (tb_env->tb_freq == 0) {
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vmclk = qemu_get_clock(vm_clock);
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/* Get the time base from tb_offset */
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tb = tb_env->tb_offset;
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/* Get the alternate time base from atb_offset */
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atb = tb_env->atb_offset;
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/* Restore the tb frequency from the decrementer frequency */
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tb_env->tb_freq = tb_env->decr_freq;
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/* Store the time base value */
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cpu_ppc_store_tb(tb_env, vmclk, &tb_env->tb_offset, tb);
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/* Store the alternate time base value */
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cpu_ppc_store_tb(tb_env, vmclk, &tb_env->atb_offset, atb);
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}
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}
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static always_inline uint32_t _cpu_ppc_load_decr (CPUState *env,
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@ -561,9 +621,9 @@ static always_inline uint32_t _cpu_ppc_load_decr (CPUState *env,
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diff = tb_env->decr_next - qemu_get_clock(vm_clock);
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if (diff >= 0)
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decr = muldiv64(diff, tb_env->tb_freq, ticks_per_sec);
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decr = muldiv64(diff, tb_env->decr_freq, ticks_per_sec);
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else
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decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec);
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decr = -muldiv64(-diff, tb_env->decr_freq, ticks_per_sec);
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#if defined(PPC_DEBUG_TB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: 0x%08x\n", __func__, decr);
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@ -639,7 +699,7 @@ static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
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}
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#endif
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now = qemu_get_clock(vm_clock);
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next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq);
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next = now + muldiv64(value, ticks_per_sec, tb_env->decr_freq);
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if (is_excp)
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next += *nextp - now;
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if (next == now)
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@ -708,6 +768,7 @@ static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
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ppc_tb_t *tb_env = env->tb_env;
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tb_env->tb_freq = freq;
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tb_env->decr_freq = freq;
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/* There is a bug in Linux 2.4 kernels:
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* if a decrementer exception is pending when it enables msr_ee at startup,
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* it's not ready to handle it...
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@ -848,7 +909,7 @@ static void start_stop_pit (CPUState *env, ppc_tb_t *tb_env, int is_excp)
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#endif
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now = qemu_get_clock(vm_clock);
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next = now + muldiv64(ppcemb_timer->pit_reload,
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ticks_per_sec, tb_env->tb_freq);
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ticks_per_sec, tb_env->decr_freq);
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if (is_excp)
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next += tb_env->decr_next - now;
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if (next == now)
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@ -912,7 +973,7 @@ static void cpu_4xx_wdt_cb (void *opaque)
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/* Cannot occur, but makes gcc happy */
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return;
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}
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next = now + muldiv64(next, ticks_per_sec, tb_env->tb_freq);
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next = now + muldiv64(next, ticks_per_sec, tb_env->decr_freq);
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if (next == now)
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next++;
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#ifdef PPC_DEBUG_TB
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@ -1014,6 +1075,7 @@ static void ppc_emb_set_tb_clk (void *opaque, uint32_t freq)
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}
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#endif
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tb_env->tb_freq = freq;
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tb_env->decr_freq = freq;
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/* XXX: we should also update all timers */
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}
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@ -1029,6 +1091,7 @@ clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq)
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env->tb_env = tb_env;
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ppcemb_timer = qemu_mallocz(sizeof(ppcemb_timer_t));
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tb_env->tb_freq = freq;
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tb_env->decr_freq = freq;
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tb_env->opaque = ppcemb_timer;
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#ifdef PPC_DEBUG_TB
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if (loglevel != 0) {
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