target-i386: introduce gen_jcc1_noeob
A jump that ends a basic block or otherwise falls back to CC_OP_DYNAMIC will always have to call gen_op_set_cc_op. However, not all jumps end a basic block, so introduce a variant that does not do this. This was partially undone earlier (i386: drop cc_op argument of gen_jcc1), redo it now also to prepare for the introduction of src2. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -1169,7 +1169,7 @@ static inline void gen_compute_eflags_c(DisasContext *s, TCGv reg)
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/* generate a conditional jump to label 'l1' according to jump opcode
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value 'b'. In the fast case, T0 is guaranted not to be used. */
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static inline void gen_jcc1(DisasContext *s, int b, int l1)
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static inline void gen_jcc1_noeob(DisasContext *s, int b, int l1)
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{
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CCPrepare cc = gen_prepare_cc(s, b, cpu_T[0]);
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@ -1184,6 +1184,26 @@ static inline void gen_jcc1(DisasContext *s, int b, int l1)
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}
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}
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/* Generate a conditional jump to label 'l1' according to jump opcode
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value 'b'. In the fast case, T0 is guaranted not to be used.
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A translation block must end soon. */
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static inline void gen_jcc1(DisasContext *s, int b, int l1)
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{
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CCPrepare cc = gen_prepare_cc(s, b, cpu_T[0]);
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gen_update_cc_op(s);
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if (cc.mask != -1) {
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tcg_gen_andi_tl(cpu_T[0], cc.reg, cc.mask);
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cc.reg = cpu_T[0];
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}
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set_cc_op(s, CC_OP_DYNAMIC);
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if (cc.use_reg2) {
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tcg_gen_brcond_tl(cc.cond, cc.reg, cc.reg2, l1);
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} else {
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tcg_gen_brcondi_tl(cc.cond, cc.reg, cc.imm, l1);
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}
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}
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/* XXX: does not work with gdbstub "ice" single step - not a
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serious problem */
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static int gen_jz_ecx_string(DisasContext *s, target_ulong next_eip)
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@ -1310,7 +1330,6 @@ static inline void gen_repz_ ## op(DisasContext *s, int ot, \
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if (!s->jmp_opt) \
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gen_op_jz_ecx(s->aflag, l2); \
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gen_jmp(s, cur_eip); \
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set_cc_op(s, CC_OP_DYNAMIC); \
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}
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GEN_REPZ(movs)
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@ -2379,11 +2398,9 @@ static inline void gen_jcc(DisasContext *s, int b,
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int l1, l2;
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if (s->jmp_opt) {
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gen_update_cc_op(s);
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l1 = gen_new_label();
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gen_jcc1(s, b, l1);
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set_cc_op(s, CC_OP_DYNAMIC);
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gen_goto_tb(s, 0, next_eip);
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gen_set_label(l1);
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@ -6077,7 +6094,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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};
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op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1);
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l1 = gen_new_label();
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gen_jcc1(s, op1, l1);
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gen_jcc1_noeob(s, op1, l1);
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gen_helper_fmov_ST0_STN(cpu_env, tcg_const_i32(opreg));
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gen_set_label(l1);
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}
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