tcg/tci: Remove tci_read_r32s

Use explicit casts for ext32s opcodes.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-01-29 11:41:09 -10:00
parent 984ae87314
commit dcf2af2662

View File

@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
return regs[index]; return regs[index];
} }
#if TCG_TARGET_REG_BITS == 64
static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
{
return (int32_t)tci_read_reg(regs, index);
}
#endif
#if TCG_TARGET_REG_BITS == 64 #if TCG_TARGET_REG_BITS == 64
static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index) static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index)
{ {
@ -149,15 +142,6 @@ static uint64_t tci_read_r64(const tcg_target_ulong *regs,
return tci_uint64(tci_read_r(regs, tb_ptr), low); return tci_uint64(tci_read_r(regs, tb_ptr), low);
} }
#elif TCG_TARGET_REG_BITS == 64 #elif TCG_TARGET_REG_BITS == 64
/* Read indexed register (32 bit signed) from bytecode. */
static int32_t tci_read_r32s(const tcg_target_ulong *regs,
const uint8_t **tb_ptr)
{
int32_t value = tci_read_reg32s(regs, **tb_ptr);
*tb_ptr += 1;
return value;
}
/* Read indexed register (64 bit) from bytecode. */ /* Read indexed register (64 bit) from bytecode. */
static uint64_t tci_read_r64(const tcg_target_ulong *regs, static uint64_t tci_read_r64(const tcg_target_ulong *regs,
const uint8_t **tb_ptr) const uint8_t **tb_ptr)
@ -870,8 +854,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
#endif #endif
case INDEX_op_ext_i32_i64: case INDEX_op_ext_i32_i64:
t0 = *tb_ptr++; t0 = *tb_ptr++;
t1 = tci_read_r32s(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1); tci_write_reg(regs, t0, (int32_t)t1);
break; break;
#if TCG_TARGET_HAS_ext32u_i64 #if TCG_TARGET_HAS_ext32u_i64
case INDEX_op_ext32u_i64: case INDEX_op_ext32u_i64: