make: automatically include dependencies in recursive subdir rules (v2)
I think I understand enough of what's going on in these rules to ensure this is right. But I could certainly use a second or third opinion... Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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4
Makefile
4
Makefile
@ -406,5 +406,5 @@ tar:
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Makefile: $(GENERATED_HEADERS)
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# Include automatically generated dependency files
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-include $(wildcard *.d audio/*.d slirp/*.d block/*.d net/*.d ui/*.d qapi/*.d)
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-include $(wildcard qga/*.d hw/*.d hw/usb/*.d)
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# All subdir dependencies come automatically from our recursive subdir rules
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-include $(wildcard *.d)
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@ -20,4 +20,4 @@ clean:
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rm -f *.o *.d *.a *~
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# Include automatically generated dependency files
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-include $(wildcard *.d */*.d)
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-include $(wildcard *.d)
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@ -216,4 +216,4 @@ GENERATED_HEADERS += config-target.h
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Makefile: $(GENERATED_HEADERS)
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# Include automatically generated dependency files
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-include $(wildcard *.d */*.d)
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-include $(wildcard *.d)
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@ -23,4 +23,4 @@ clean:
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done
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# Include automatically generated dependency files
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-include $(wildcard *.d */*.d)
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-include $(wildcard *.d)
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@ -7,7 +7,7 @@ obj-y += debugcon.o multiboot.o
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obj-y += pc_piix.o
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obj-y += pc_sysfw.o
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obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
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obj-$(CONFIG_KVM) += kvm/clock.o kvm/apic.o kvm/i8259.o kvm/ioapic.o kvm/i8254.o
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obj-y += kvm/
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obj-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o
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obj-y := $(addprefix ../,$(obj-y))
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1
hw/kvm/Makefile.objs
Normal file
1
hw/kvm/Makefile.objs
Normal file
@ -0,0 +1 @@
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obj-$(CONFIG_KVM) += clock.o apic.o i8259.o ioapic.o i8254.o
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@ -94,6 +94,7 @@ define unnest-dir
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$(foreach var,$(nested-vars),$(call push-var,$(var),$1/))
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$(eval obj := $(obj)/$1)
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$(eval include $(SRC_PATH)/$1/Makefile.objs)
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$(eval -include $(wildcard $1/*.d))
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$(eval obj := $(patsubst %/$1,%,$(obj)))
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$(foreach var,$(nested-vars),$(call pop-var,$(var),$1/))
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endef
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