ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines
Wire the ChipTOD model to powernv9 and powernv10 machines. Suggested-by-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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hw/ppc/pnv.c
30
hw/ppc/pnv.c
@ -1427,6 +1427,8 @@ static void pnv_chip_power9_instance_init(Object *obj)
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object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC);
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object_initialize_child(obj, "chiptod", &chip9->chiptod, TYPE_PNV9_CHIPTOD);
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object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC);
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object_initialize_child(obj, "sbe", &chip9->sbe, TYPE_PNV9_SBE);
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@ -1573,6 +1575,19 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
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(uint64_t) PNV9_LPCM_BASE(chip));
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/* ChipTOD */
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object_property_set_bool(OBJECT(&chip9->chiptod), "primary",
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chip->chip_id == 0, &error_abort);
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object_property_set_bool(OBJECT(&chip9->chiptod), "secondary",
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chip->chip_id == 1, &error_abort);
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object_property_set_link(OBJECT(&chip9->chiptod), "chip", OBJECT(chip),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip9->chiptod), NULL, errp)) {
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return;
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}
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pnv_xscom_add_subregion(chip, PNV9_XSCOM_CHIPTOD_BASE,
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&chip9->chiptod.xscom_regs);
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/* Create the simplified OCC model */
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if (!qdev_realize(DEVICE(&chip9->occ), NULL, errp)) {
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return;
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@ -1685,6 +1700,8 @@ static void pnv_chip_power10_instance_init(Object *obj)
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"xive-fabric");
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object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI);
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object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC);
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object_initialize_child(obj, "chiptod", &chip10->chiptod,
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TYPE_PNV10_CHIPTOD);
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object_initialize_child(obj, "occ", &chip10->occ, TYPE_PNV10_OCC);
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object_initialize_child(obj, "sbe", &chip10->sbe, TYPE_PNV10_SBE);
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object_initialize_child(obj, "homer", &chip10->homer, TYPE_PNV10_HOMER);
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@ -1820,6 +1837,19 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
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(uint64_t) PNV10_LPCM_BASE(chip));
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/* ChipTOD */
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object_property_set_bool(OBJECT(&chip10->chiptod), "primary",
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chip->chip_id == 0, &error_abort);
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object_property_set_bool(OBJECT(&chip10->chiptod), "secondary",
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chip->chip_id == 1, &error_abort);
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object_property_set_link(OBJECT(&chip10->chiptod), "chip", OBJECT(chip),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip10->chiptod), NULL, errp)) {
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return;
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}
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pnv_xscom_add_subregion(chip, PNV10_XSCOM_CHIPTOD_BASE,
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&chip10->chiptod.xscom_regs);
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/* Create the simplified OCC model */
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if (!qdev_realize(DEVICE(&chip10->occ), NULL, errp)) {
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return;
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@ -2,6 +2,7 @@
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#define PPC_PNV_CHIP_H
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#include "hw/pci-host/pnv_phb4.h"
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#include "hw/ppc/pnv_chiptod.h"
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#include "hw/ppc/pnv_core.h"
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#include "hw/ppc/pnv_homer.h"
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#include "hw/ppc/pnv_n1_chiplet.h"
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@ -79,6 +80,7 @@ struct Pnv9Chip {
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PnvXive xive;
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Pnv9Psi psi;
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PnvLpcController lpc;
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PnvChipTOD chiptod;
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PnvOCC occ;
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PnvSBE sbe;
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PnvHomer homer;
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@ -111,6 +113,7 @@ struct Pnv10Chip {
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PnvXive2 xive;
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Pnv9Psi psi;
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PnvLpcController lpc;
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PnvChipTOD chiptod;
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PnvOCC occ;
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PnvSBE sbe;
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PnvHomer homer;
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