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ssi: Name the CS GPIO

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To get it out of the default GPIO list. This allows child devices to
use the un-named GPIO namespace without having to be SSI aware. That
is, there is no more need for machines to know about the obscure
policy where GPIO 0 is the SSI chip-select and GPIO 1..N are the
concrete class GPIOs (defined locally as 0..N-1).

This is most notable in stellaris, which uses a device which has both
SSI and concrete level GPIOs.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Peter Crosthwaite 2014-05-19 23:31:33 -07:00 committed by Andreas Färber
parent a5f54290ce
commit de77914e50
5 changed files with 10 additions and 7 deletions
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7
hw/arm/stellaris.c
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@ -1290,9 +1290,10 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
sddev = ssi_create_slave(bus, "ssi-sd");
ssddev = ssi_create_slave(bus, "ssd0323");
gpio_out[GPIO_D][0] = qemu_irq_split(qdev_get_gpio_in(sddev, 0),
qdev_get_gpio_in(ssddev, 0));
gpio_out[GPIO_C][7] = qdev_get_gpio_in(ssddev, 1);
gpio_out[GPIO_D][0] = qemu_irq_split(
qdev_get_gpio_in_named(sddev, SSI_GPIO_CS, 0),
qdev_get_gpio_in_named(ssddev, SSI_GPIO_CS, 0));
gpio_out[GPIO_C][7] = qdev_get_gpio_in(ssddev, 0);
/* Make sure the select pin is high. */
qemu_irq_raise(gpio_out[GPIO_D][0]);

2
hw/arm/xilinx_zynq.c
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@ -94,7 +94,7 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
for (j = 0; j < num_ss; ++j) {
flash_dev = ssi_create_slave(spi, "n25q128");
cs_line = qdev_get_gpio_in(flash_dev, 0);
cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
sysbus_connect_irq(busdev, i * num_ss + j + 1, cs_line);
}
}

2
hw/microblaze/petalogix_ml605_mmu.c
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@ -196,7 +196,7 @@ petalogix_ml605_init(MachineState *machine)
qemu_irq cs_line;
dev = ssi_create_slave(spi, "n25q128");
cs_line = qdev_get_gpio_in(dev, 0);
cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
sysbus_connect_irq(busdev, i+1, cs_line);
}
}

4
hw/ssi/ssi.c
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@ -60,7 +60,7 @@ static int ssi_slave_init(DeviceState *dev)
if (ssc->transfer_raw == ssi_transfer_raw_default &&
ssc->cs_polarity != SSI_CS_NONE) {
qdev_init_gpio_in(dev, ssi_cs_default, 1);
qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
}
return ssc->init(s);
@ -155,7 +155,7 @@ static int ssi_auto_connect_slave(Object *child, void *opaque)
return 0;
}
cs_line = qdev_get_gpio_in(DEVICE(dev), 0);
cs_line = qdev_get_gpio_in_named(DEVICE(dev), SSI_GPIO_CS, 0);
qdev_set_parent_bus(DEVICE(dev), BUS(arg->bus));
**arg->cs_linep = cs_line;
(*arg->cs_linep)++;

2
include/hw/ssi.h
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@ -23,6 +23,8 @@ typedef struct SSISlave SSISlave;
#define SSI_SLAVE_GET_CLASS(obj) \
OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE)
#define SSI_GPIO_CS "ssi-gpio-cs"
typedef enum {
SSI_CS_NONE = 0,
SSI_CS_LOW,