accel/tcg: Always lock pages before translation
We had done this for user-mode by invoking page_protect within the translator loop. Extend this to handle system mode as well. Move page locking out of tb_link_page. Reported-by: Liren Wei <lrwei@bupt.edu.cn> Reported-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Richard W.M. Jones <rjones@redhat.com>
This commit is contained in:
Richard Henderson
parent
d713cf4d6c
commit
deba78709a
@ -536,6 +536,26 @@ static void cpu_exec_longjmp_cleanup(CPUState *cpu)
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if (have_mmap_lock()) {
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mmap_unlock();
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}
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#else
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/*
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* For softmmu, a tlb_fill fault during translation will land here,
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* and we need to release any page locks held. In system mode we
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* have one tcg_ctx per thread, so we know it was this cpu doing
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* the translation.
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*
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* Alternative 1: Install a cleanup to be called via an exception
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* handling safe longjmp. It seems plausible that all our hosts
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* support such a thing. We'd have to properly register unwind info
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* for the JIT for EH, rather that just for GDB.
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*
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* Alternative 2: Set and restore cpu->jmp_env in tb_gen_code to
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* capture the cpu_loop_exit longjmp, perform the cleanup, and
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* jump again to arrive here.
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*/
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if (tcg_ctx->gen_tb) {
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tb_unlock_pages(tcg_ctx->gen_tb);
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tcg_ctx->gen_tb = NULL;
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}
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#endif
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if (qemu_mutex_iothread_locked()) {
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qemu_mutex_unlock_iothread();
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@ -10,6 +10,7 @@
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#define ACCEL_TCG_INTERNAL_H
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#include "exec/exec-all.h"
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#include "exec/translate-all.h"
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/*
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* Access to the various translations structures need to be serialised
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@ -35,6 +36,32 @@ static inline void page_table_config_init(void) { }
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void page_table_config_init(void);
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#endif
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#ifdef CONFIG_USER_ONLY
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/*
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* For user-only, page_protect sets the page read-only.
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* Since most execution is already on read-only pages, and we'd need to
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* account for other TBs on the same page, defer undoing any page protection
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* until we receive the write fault.
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*/
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static inline void tb_lock_page0(tb_page_addr_t p0)
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{
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page_protect(p0);
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}
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static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1)
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{
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page_protect(p1);
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}
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static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { }
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static inline void tb_unlock_pages(TranslationBlock *tb) { }
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#else
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void tb_lock_page0(tb_page_addr_t);
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void tb_lock_page1(tb_page_addr_t, tb_page_addr_t);
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void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
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void tb_unlock_pages(TranslationBlock *);
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#endif
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#ifdef CONFIG_SOFTMMU
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void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
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unsigned size,
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@ -48,8 +75,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, vaddr pc,
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void page_init(void);
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void tb_htable_init(void);
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void tb_reset_jump(TranslationBlock *tb, int n);
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TranslationBlock *tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
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tb_page_addr_t phys_page2);
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TranslationBlock *tb_link_page(TranslationBlock *tb);
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bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
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void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
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uintptr_t host_pc);
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@ -70,17 +70,7 @@ typedef struct PageDesc PageDesc;
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*/
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#define assert_page_locked(pd) tcg_debug_assert(have_mmap_lock())
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static inline void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1,
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PageDesc **ret_p2, tb_page_addr_t phys2,
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bool alloc)
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{
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*ret_p1 = NULL;
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*ret_p2 = NULL;
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}
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static inline void page_unlock(PageDesc *pd) { }
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static inline void page_lock_tb(const TranslationBlock *tb) { }
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static inline void page_unlock_tb(const TranslationBlock *tb) { }
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static inline void tb_lock_pages(const TranslationBlock *tb) { }
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/*
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* For user-only, since we are protecting all of memory with a single lock,
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@ -96,7 +86,7 @@ static void tb_remove_all(void)
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}
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/* Call with mmap_lock held. */
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static void tb_record(TranslationBlock *tb, PageDesc *p1, PageDesc *p2)
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static void tb_record(TranslationBlock *tb)
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{
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vaddr addr;
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int flags;
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@ -391,12 +381,108 @@ static void page_lock(PageDesc *pd)
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qemu_spin_lock(&pd->lock);
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}
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/* Like qemu_spin_trylock, returns false on success */
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static bool page_trylock(PageDesc *pd)
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{
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bool busy = qemu_spin_trylock(&pd->lock);
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if (!busy) {
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page_lock__debug(pd);
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}
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return busy;
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}
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static void page_unlock(PageDesc *pd)
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{
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qemu_spin_unlock(&pd->lock);
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page_unlock__debug(pd);
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}
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void tb_lock_page0(tb_page_addr_t paddr)
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{
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page_lock(page_find_alloc(paddr >> TARGET_PAGE_BITS, true));
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}
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void tb_lock_page1(tb_page_addr_t paddr0, tb_page_addr_t paddr1)
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{
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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PageDesc *pd0, *pd1;
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if (pindex0 == pindex1) {
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/* Identical pages, and the first page is already locked. */
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return;
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}
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pd1 = page_find_alloc(pindex1, true);
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if (pindex0 < pindex1) {
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/* Correct locking order, we may block. */
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page_lock(pd1);
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return;
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}
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/* Incorrect locking order, we cannot block lest we deadlock. */
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if (!page_trylock(pd1)) {
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return;
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}
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/*
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* Drop the lock on page0 and get both page locks in the right order.
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* Restart translation via longjmp.
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*/
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pd0 = page_find_alloc(pindex0, false);
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page_unlock(pd0);
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page_lock(pd1);
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page_lock(pd0);
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siglongjmp(tcg_ctx->jmp_trans, -3);
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}
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void tb_unlock_page1(tb_page_addr_t paddr0, tb_page_addr_t paddr1)
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{
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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if (pindex0 != pindex1) {
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page_unlock(page_find_alloc(pindex1, false));
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}
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}
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static void tb_lock_pages(TranslationBlock *tb)
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{
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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if (unlikely(paddr0 == -1)) {
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return;
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}
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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if (pindex0 < pindex1) {
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page_lock(page_find_alloc(pindex0, true));
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page_lock(page_find_alloc(pindex1, true));
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return;
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}
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page_lock(page_find_alloc(pindex1, true));
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}
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page_lock(page_find_alloc(pindex0, true));
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}
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void tb_unlock_pages(TranslationBlock *tb)
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{
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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if (unlikely(paddr0 == -1)) {
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return;
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}
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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page_unlock(page_find_alloc(pindex1, false));
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}
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page_unlock(page_find_alloc(pindex0, false));
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}
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static inline struct page_entry *
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page_entry_new(PageDesc *pd, tb_page_addr_t index)
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{
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@ -420,13 +506,10 @@ static void page_entry_destroy(gpointer p)
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/* returns false on success */
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static bool page_entry_trylock(struct page_entry *pe)
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{
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bool busy;
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busy = qemu_spin_trylock(&pe->pd->lock);
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bool busy = page_trylock(pe->pd);
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if (!busy) {
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g_assert(!pe->locked);
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pe->locked = true;
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page_lock__debug(pe->pd);
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}
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return busy;
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}
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@ -604,8 +687,7 @@ static void tb_remove_all(void)
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* Add the tb in the target page and protect it if necessary.
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* Called with @p->lock held.
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*/
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static inline void tb_page_add(PageDesc *p, TranslationBlock *tb,
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unsigned int n)
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static void tb_page_add(PageDesc *p, TranslationBlock *tb, unsigned int n)
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{
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bool page_already_protected;
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@ -625,15 +707,21 @@ static inline void tb_page_add(PageDesc *p, TranslationBlock *tb,
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}
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}
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static void tb_record(TranslationBlock *tb, PageDesc *p1, PageDesc *p2)
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static void tb_record(TranslationBlock *tb)
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{
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tb_page_add(p1, tb, 0);
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if (unlikely(p2)) {
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tb_page_add(p2, tb, 1);
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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tb_page_add(page_find_alloc(pindex1, false), tb, 1);
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}
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tb_page_add(page_find_alloc(pindex0, false), tb, 0);
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}
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static inline void tb_page_remove(PageDesc *pd, TranslationBlock *tb)
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static void tb_page_remove(PageDesc *pd, TranslationBlock *tb)
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{
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TranslationBlock *tb1;
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uintptr_t *pprev;
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@ -653,74 +741,16 @@ static inline void tb_page_remove(PageDesc *pd, TranslationBlock *tb)
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static void tb_remove(TranslationBlock *tb)
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{
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PageDesc *pd;
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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pd = page_find(tb->page_addr[0] >> TARGET_PAGE_BITS);
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tb_page_remove(pd, tb);
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if (unlikely(tb->page_addr[1] != -1)) {
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pd = page_find(tb->page_addr[1] >> TARGET_PAGE_BITS);
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tb_page_remove(pd, tb);
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}
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}
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static void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1,
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PageDesc **ret_p2, tb_page_addr_t phys2, bool alloc)
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{
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PageDesc *p1, *p2;
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tb_page_addr_t page1;
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tb_page_addr_t page2;
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assert_memory_lock();
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g_assert(phys1 != -1);
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page1 = phys1 >> TARGET_PAGE_BITS;
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page2 = phys2 >> TARGET_PAGE_BITS;
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p1 = page_find_alloc(page1, alloc);
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if (ret_p1) {
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*ret_p1 = p1;
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}
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if (likely(phys2 == -1)) {
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page_lock(p1);
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return;
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} else if (page1 == page2) {
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page_lock(p1);
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if (ret_p2) {
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*ret_p2 = p1;
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}
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return;
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}
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p2 = page_find_alloc(page2, alloc);
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if (ret_p2) {
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*ret_p2 = p2;
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}
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if (page1 < page2) {
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page_lock(p1);
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page_lock(p2);
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} else {
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page_lock(p2);
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page_lock(p1);
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}
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}
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/* lock the page(s) of a TB in the correct acquisition order */
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static void page_lock_tb(const TranslationBlock *tb)
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{
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page_lock_pair(NULL, tb_page_addr0(tb), NULL, tb_page_addr1(tb), false);
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}
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static void page_unlock_tb(const TranslationBlock *tb)
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{
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PageDesc *p1 = page_find(tb_page_addr0(tb) >> TARGET_PAGE_BITS);
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page_unlock(p1);
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if (unlikely(tb_page_addr1(tb) != -1)) {
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PageDesc *p2 = page_find(tb_page_addr1(tb) >> TARGET_PAGE_BITS);
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if (p2 != p1) {
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page_unlock(p2);
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}
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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tb_page_remove(page_find_alloc(pindex1, false), tb);
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}
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tb_page_remove(page_find_alloc(pindex0, false), tb);
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}
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#endif /* CONFIG_USER_ONLY */
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@ -925,18 +955,16 @@ static void tb_phys_invalidate__locked(TranslationBlock *tb)
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void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
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{
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if (page_addr == -1 && tb_page_addr0(tb) != -1) {
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page_lock_tb(tb);
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tb_lock_pages(tb);
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do_tb_phys_invalidate(tb, true);
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page_unlock_tb(tb);
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tb_unlock_pages(tb);
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} else {
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do_tb_phys_invalidate(tb, false);
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}
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}
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/*
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* Add a new TB and link it to the physical page tables. phys_page2 is
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* (-1) to indicate that only one page contains the TB.
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*
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* Add a new TB and link it to the physical page tables.
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* Called with mmap_lock held for user-mode emulation.
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*
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* Returns a pointer @tb, or a pointer to an existing TB that matches @tb.
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@ -944,43 +972,29 @@ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
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* for the same block of guest code that @tb corresponds to. In that case,
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* the caller should discard the original @tb, and use instead the returned TB.
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*/
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TranslationBlock *tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
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tb_page_addr_t phys_page2)
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TranslationBlock *tb_link_page(TranslationBlock *tb)
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{
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PageDesc *p;
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PageDesc *p2 = NULL;
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void *existing_tb = NULL;
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uint32_t h;
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assert_memory_lock();
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tcg_debug_assert(!(tb->cflags & CF_INVALID));
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/*
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* Add the TB to the page list, acquiring first the pages's locks.
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* We keep the locks held until after inserting the TB in the hash table,
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* so that if the insertion fails we know for sure that the TBs are still
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* in the page descriptors.
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* Note that inserting into the hash table first isn't an option, since
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* we can only insert TBs that are fully initialized.
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*/
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page_lock_pair(&p, phys_pc, &p2, phys_page2, true);
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tb_record(tb, p, p2);
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tb_record(tb);
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/* add in the hash table */
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h = tb_hash_func(phys_pc, (tb->cflags & CF_PCREL ? 0 : tb->pc),
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h = tb_hash_func(tb_page_addr0(tb), (tb->cflags & CF_PCREL ? 0 : tb->pc),
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tb->flags, tb->cs_base, tb->cflags);
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qht_insert(&tb_ctx.htable, tb, h, &existing_tb);
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/* remove TB from the page(s) if we couldn't insert it */
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if (unlikely(existing_tb)) {
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tb_remove(tb);
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tb = existing_tb;
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tb_unlock_pages(tb);
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return existing_tb;
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}
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if (p2 && p2 != p) {
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page_unlock(p2);
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}
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page_unlock(p);
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tb_unlock_pages(tb);
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return tb;
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}
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@ -290,7 +290,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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{
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CPUArchState *env = cpu->env_ptr;
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TranslationBlock *tb, *existing_tb;
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tb_page_addr_t phys_pc;
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tb_page_addr_t phys_pc, phys_p2;
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tcg_insn_unit *gen_code_buf;
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int gen_code_size, search_size, max_insns;
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int64_t ti;
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@ -313,6 +313,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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||||
QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS);
|
||||
|
||||
buffer_overflow:
|
||||
assert_no_pages_locked();
|
||||
tb = tcg_tb_alloc(tcg_ctx);
|
||||
if (unlikely(!tb)) {
|
||||
/* flush must be done */
|
||||
@ -333,6 +334,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
tb->cflags = cflags;
|
||||
tb_set_page_addr0(tb, phys_pc);
|
||||
tb_set_page_addr1(tb, -1);
|
||||
if (phys_pc != -1) {
|
||||
tb_lock_page0(phys_pc);
|
||||
}
|
||||
|
||||
tcg_ctx->gen_tb = tb;
|
||||
tcg_ctx->addr_type = TARGET_LONG_BITS == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;
|
||||
#ifdef CONFIG_SOFTMMU
|
||||
@ -349,8 +354,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
tcg_ctx->guest_mo = TCG_MO_ALL;
|
||||
#endif
|
||||
|
||||
tb_overflow:
|
||||
|
||||
restart_translate:
|
||||
trace_translate_block(tb, pc, tb->tc.ptr);
|
||||
|
||||
gen_code_size = setjmp_gen_code(env, tb, pc, host_pc, &max_insns, &ti);
|
||||
@ -369,6 +373,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
|
||||
"Restarting code generation for "
|
||||
"code_gen_buffer overflow\n");
|
||||
tb_unlock_pages(tb);
|
||||
goto buffer_overflow;
|
||||
|
||||
case -2:
|
||||
@ -387,14 +392,39 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
"Restarting code generation with "
|
||||
"smaller translation block (max %d insns)\n",
|
||||
max_insns);
|
||||
goto tb_overflow;
|
||||
|
||||
/*
|
||||
* The half-sized TB may not cross pages.
|
||||
* TODO: Fix all targets that cross pages except with
|
||||
* the first insn, at which point this can't be reached.
|
||||
*/
|
||||
phys_p2 = tb_page_addr1(tb);
|
||||
if (unlikely(phys_p2 != -1)) {
|
||||
tb_unlock_page1(phys_pc, phys_p2);
|
||||
tb_set_page_addr1(tb, -1);
|
||||
}
|
||||
goto restart_translate;
|
||||
|
||||
case -3:
|
||||
/*
|
||||
* We had a page lock ordering problem. In order to avoid
|
||||
* deadlock we had to drop the lock on page0, which means
|
||||
* that everything we translated so far is compromised.
|
||||
* Restart with locks held on both pages.
|
||||
*/
|
||||
qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
|
||||
"Restarting code generation with re-locked pages");
|
||||
goto restart_translate;
|
||||
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
tcg_ctx->gen_tb = NULL;
|
||||
|
||||
search_size = encode_search(tb, (void *)gen_code_buf + gen_code_size);
|
||||
if (unlikely(search_size < 0)) {
|
||||
tb_unlock_pages(tb);
|
||||
goto buffer_overflow;
|
||||
}
|
||||
tb->tc.size = gen_code_size;
|
||||
@ -504,6 +534,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
* before attempting to link to other TBs or add to the lookup table.
|
||||
*/
|
||||
if (tb_page_addr0(tb) == -1) {
|
||||
assert_no_pages_locked();
|
||||
return tb;
|
||||
}
|
||||
|
||||
@ -518,7 +549,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
|
||||
* No explicit memory barrier is required -- tb_link_page() makes the
|
||||
* TB visible in a consistent state.
|
||||
*/
|
||||
existing_tb = tb_link_page(tb, tb_page_addr0(tb), tb_page_addr1(tb));
|
||||
existing_tb = tb_link_page(tb);
|
||||
assert_no_pages_locked();
|
||||
|
||||
/* if the TB already exists, discard what we just translated */
|
||||
if (unlikely(existing_tb != tb)) {
|
||||
uintptr_t orig_aligned = (uintptr_t)gen_code_buf;
|
||||
|
||||
@ -12,9 +12,9 @@
|
||||
#include "qemu/error-report.h"
|
||||
#include "exec/exec-all.h"
|
||||
#include "exec/translator.h"
|
||||
#include "exec/translate-all.h"
|
||||
#include "exec/plugin-gen.h"
|
||||
#include "tcg/tcg-op-common.h"
|
||||
#include "internal.h"
|
||||
|
||||
static void gen_io_start(void)
|
||||
{
|
||||
@ -147,10 +147,6 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
|
||||
db->host_addr[0] = host_pc;
|
||||
db->host_addr[1] = NULL;
|
||||
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
page_protect(pc);
|
||||
#endif
|
||||
|
||||
ops->init_disas_context(db, cpu);
|
||||
tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
|
||||
|
||||
@ -256,22 +252,36 @@ static void *translator_access(CPUArchState *env, DisasContextBase *db,
|
||||
host = db->host_addr[1];
|
||||
base = TARGET_PAGE_ALIGN(db->pc_first);
|
||||
if (host == NULL) {
|
||||
tb_page_addr_t phys_page =
|
||||
get_page_addr_code_hostp(env, base, &db->host_addr[1]);
|
||||
tb_page_addr_t page0, old_page1, new_page1;
|
||||
|
||||
new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]);
|
||||
|
||||
/*
|
||||
* If the second page is MMIO, treat as if the first page
|
||||
* was MMIO as well, so that we do not cache the TB.
|
||||
*/
|
||||
if (unlikely(phys_page == -1)) {
|
||||
if (unlikely(new_page1 == -1)) {
|
||||
tb_unlock_pages(tb);
|
||||
tb_set_page_addr0(tb, -1);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
tb_set_page_addr1(tb, phys_page);
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
page_protect(end);
|
||||
#endif
|
||||
/*
|
||||
* If this is not the first time around, and page1 matches,
|
||||
* then we already have the page locked. Alternately, we're
|
||||
* not doing anything to prevent the PTE from changing, so
|
||||
* we might wind up with a different page, requiring us to
|
||||
* re-do the locking.
|
||||
*/
|
||||
old_page1 = tb_page_addr1(tb);
|
||||
if (likely(new_page1 != old_page1)) {
|
||||
page0 = tb_page_addr0(tb);
|
||||
if (unlikely(old_page1 != -1)) {
|
||||
tb_unlock_page1(page0, old_page1);
|
||||
}
|
||||
tb_set_page_addr1(tb, new_page1);
|
||||
tb_lock_page1(page0, new_page1);
|
||||
}
|
||||
host = db->host_addr[1];
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user