hw/arm/virt-acpi-build: Generation of DSDT table for virt devices
DSDT consists of the usual common table header plus a definition block in AML encoding which describes all devices in the platform. After initializing DSDT with header information the namespace is created which is followed by the device encodings. The devices are described using the Resource Template for the 32-Bit Fixed Memory Range and the Extended Interrupt Descriptors. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1432522520-8068-8-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -40,6 +40,134 @@
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#include "hw/hw.h"
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#include "hw/acpi/aml-build.h"
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#define ARM_SPI_BASE 32
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static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
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{
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uint16_t i;
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for (i = 0; i < smp_cpus; i++) {
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Aml *dev = aml_device("C%03x", i);
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aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
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aml_append(dev, aml_name_decl("_UID", aml_int(i)));
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aml_append(scope, dev);
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}
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}
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static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
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int uart_irq)
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{
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Aml *dev = aml_device("COM0");
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aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0011")));
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aml_append(dev, aml_name_decl("_UID", aml_int(0)));
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Aml *crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(uart_memmap->base,
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uart_memmap->size, AML_READ_WRITE));
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aml_append(crs,
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aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
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AML_EXCLUSIVE, uart_irq));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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static void acpi_dsdt_add_rtc(Aml *scope, const MemMapEntry *rtc_memmap,
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int rtc_irq)
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{
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Aml *dev = aml_device("RTC0");
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0013")));
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aml_append(dev, aml_name_decl("_UID", aml_int(0)));
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Aml *crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(rtc_memmap->base,
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rtc_memmap->size, AML_READ_WRITE));
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aml_append(crs,
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aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
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AML_EXCLUSIVE, rtc_irq));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap)
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{
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Aml *dev, *crs;
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hwaddr base = flash_memmap->base;
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hwaddr size = flash_memmap->size;
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dev = aml_device("FLS0");
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
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aml_append(dev, aml_name_decl("_UID", aml_int(0)));
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crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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dev = aml_device("FLS1");
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(base + size, size, AML_READ_WRITE));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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static void acpi_dsdt_add_virtio(Aml *scope,
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const MemMapEntry *virtio_mmio_memmap,
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int mmio_irq, int num)
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{
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hwaddr base = virtio_mmio_memmap->base;
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hwaddr size = virtio_mmio_memmap->size;
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int irq = mmio_irq;
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int i;
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for (i = 0; i < num; i++) {
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Aml *dev = aml_device("VR%02u", i);
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
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aml_append(dev, aml_name_decl("_UID", aml_int(i)));
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Aml *crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
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aml_append(crs,
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aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
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AML_EXCLUSIVE, irq + i));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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base += size;
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}
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}
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/* DSDT */
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static void
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build_dsdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
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{
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Aml *scope, *dsdt;
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const MemMapEntry *memmap = guest_info->memmap;
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const int *irqmap = guest_info->irqmap;
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dsdt = init_aml_allocator();
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/* Reserve space for header */
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acpi_data_push(dsdt->buf, sizeof(AcpiTableHeader));
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scope = aml_scope("\\_SB");
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acpi_dsdt_add_cpus(scope, guest_info->smp_cpus);
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acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
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(irqmap[VIRT_UART] + ARM_SPI_BASE));
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acpi_dsdt_add_rtc(scope, &memmap[VIRT_RTC],
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(irqmap[VIRT_RTC] + ARM_SPI_BASE));
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acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
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acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
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(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
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aml_append(dsdt, scope);
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/* copy AML table into ACPI tables blob and patch header there */
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g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
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build_header(linker, table_data,
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(void *)(table_data->data + table_data->len - dsdt->buf->len),
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"DSDT", dsdt->buf->len, 5);
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free_aml_allocator();
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}
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typedef
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struct AcpiBuildState {
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/* Copy of table in RAM (for patching). */
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@ -55,6 +183,7 @@ static
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void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
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{
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GArray *table_offsets;
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GArray *tables_blob = tables->table_data;
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table_offsets = g_array_new(false, true /* clear */,
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sizeof(uint32_t));
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@ -72,6 +201,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
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* DSDT
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*/
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/* DSDT is pointed to by FADT */
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build_dsdt(tables_blob, tables->linker, guest_info);
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/* Cleanup memory that's no longer used. */
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g_array_free(table_offsets, true);
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}
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