tcg/arm: More use of the TCGReg enum
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
142fb62fd0
commit
e028eada62
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@ -559,7 +559,7 @@ static void tcg_out_bl_imm(TCGContext *s, ARMCond cond, int32_t offset)
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(((offset - 8) >> 2) & 0x00ffffff));
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}
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static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, int rn)
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static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, TCGReg rn)
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{
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tcg_out32(s, (cond << 28) | 0x012fff30 | rn);
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}
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@ -570,14 +570,14 @@ static void tcg_out_blx_imm(TCGContext *s, int32_t offset)
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(((offset - 8) >> 2) & 0x00ffffff));
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}
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static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc, int rd,
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int rn, int rm, int shift)
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static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc,
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TCGReg rd, TCGReg rn, TCGReg rm, int shift)
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{
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tcg_out32(s, (cond << 28) | (0 << 25) | opc |
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(rn << 16) | (rd << 12) | shift | rm);
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}
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static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, int rd, int rm)
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static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rm)
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{
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/* Simple reg-reg move, optimising out the 'do nothing' case */
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if (rd != rm) {
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@ -604,7 +604,7 @@ static void tcg_out_b_reg(TCGContext *s, ARMCond cond, TCGReg rn)
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}
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static void tcg_out_dat_imm(TCGContext *s, ARMCond cond, ARMInsn opc,
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int rd, int rn, int im)
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TCGReg rd, TCGReg rn, int im)
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{
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tcg_out32(s, (cond << 28) | (1 << 25) | opc |
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(rn << 16) | (rd << 12) | im);
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@ -788,13 +788,15 @@ static void tcg_out_ld8s_r(TCGContext *s, ARMCond cond, TCGReg rt,
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tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0);
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}
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static void tcg_out_movi_pool(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
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static void tcg_out_movi_pool(TCGContext *s, ARMCond cond,
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TCGReg rd, uint32_t arg)
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{
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new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0);
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tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0);
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}
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static void tcg_out_movi32(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
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static void tcg_out_movi32(TCGContext *s, ARMCond cond,
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TCGReg rd, uint32_t arg)
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{
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int imm12, diff, opc, sh1, sh2;
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uint32_t tt0, tt1, tt2;
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@ -873,8 +875,8 @@ static void tcg_out_movi32(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
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* Emit either the reg,imm or reg,reg form of a data-processing insn.
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* rhs must satisfy the "rI" constraint.
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*/
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static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc, TCGArg dst,
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TCGArg lhs, TCGArg rhs, int rhs_is_const)
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static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc,
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TCGReg dst, TCGReg lhs, TCGArg rhs, int rhs_is_const)
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{
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if (rhs_is_const) {
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tcg_out_dat_imm(s, cond, opc, dst, lhs, encode_imm_nofail(rhs));
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@ -904,7 +906,7 @@ static void tcg_out_dat_rIK(TCGContext *s, ARMCond cond, ARMInsn opc,
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}
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static void tcg_out_dat_rIN(TCGContext *s, ARMCond cond, ARMInsn opc,
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ARMInsn opneg, TCGArg dst, TCGArg lhs, TCGArg rhs,
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ARMInsn opneg, TCGReg dst, TCGReg lhs, TCGArg rhs,
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bool rhs_is_const)
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{
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/* Emit either the reg,imm or reg,reg form of a data-processing insn.
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@ -978,17 +980,19 @@ static void tcg_out_smull32(TCGContext *s, ARMCond cond, TCGReg rd0,
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(rd1 << 16) | (rd0 << 12) | (rm << 8) | rn);
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}
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static void tcg_out_sdiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
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static void tcg_out_sdiv(TCGContext *s, ARMCond cond,
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TCGReg rd, TCGReg rn, TCGReg rm)
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{
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tcg_out32(s, 0x0710f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
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}
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static void tcg_out_udiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
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static void tcg_out_udiv(TCGContext *s, ARMCond cond,
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TCGReg rd, TCGReg rn, TCGReg rm)
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{
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tcg_out32(s, 0x0730f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
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}
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static void tcg_out_ext8s(TCGContext *s, ARMCond cond, int rd, int rn)
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static void tcg_out_ext8s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
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{
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if (use_armv6_instructions) {
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/* sxtb */
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@ -1002,12 +1006,12 @@ static void tcg_out_ext8s(TCGContext *s, ARMCond cond, int rd, int rn)
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}
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static void __attribute__((unused))
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tcg_out_ext8u(TCGContext *s, ARMCond cond, int rd, int rn)
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tcg_out_ext8u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
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{
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tcg_out_dat_imm(s, cond, ARITH_AND, rd, rn, 0xff);
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}
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static void tcg_out_ext16s(TCGContext *s, ARMCond cond, int rd, int rn)
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static void tcg_out_ext16s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
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{
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if (use_armv6_instructions) {
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/* sxth */
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@ -1020,7 +1024,7 @@ static void tcg_out_ext16s(TCGContext *s, ARMCond cond, int rd, int rn)
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}
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}
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static void tcg_out_ext16u(TCGContext *s, ARMCond cond, int rd, int rn)
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static void tcg_out_ext16u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
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{
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if (use_armv6_instructions) {
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/* uxth */
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@ -1033,7 +1037,8 @@ static void tcg_out_ext16u(TCGContext *s, ARMCond cond, int rd, int rn)
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}
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}
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static void tcg_out_bswap16(TCGContext *s, ARMCond cond, int rd, int rn, int flags)
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static void tcg_out_bswap16(TCGContext *s, ARMCond cond,
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TCGReg rd, TCGReg rn, int flags)
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{
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if (use_armv6_instructions) {
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if (flags & TCG_BSWAP_OS) {
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@ -1100,7 +1105,7 @@ static void tcg_out_bswap16(TCGContext *s, ARMCond cond, int rd, int rn, int fla
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? SHIFT_IMM_ASR(8) : SHIFT_IMM_LSR(8)));
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}
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static void tcg_out_bswap32(TCGContext *s, ARMCond cond, int rd, int rn)
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static void tcg_out_bswap32(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
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{
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if (use_armv6_instructions) {
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/* rev */
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@ -1130,23 +1135,23 @@ static void tcg_out_deposit(TCGContext *s, ARMCond cond, TCGReg rd,
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}
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static void tcg_out_extract(TCGContext *s, ARMCond cond, TCGReg rd,
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TCGArg a1, int ofs, int len)
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TCGReg rn, int ofs, int len)
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{
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/* ubfx */
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tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | a1
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tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | rn
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| (ofs << 7) | ((len - 1) << 16));
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}
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static void tcg_out_sextract(TCGContext *s, ARMCond cond, TCGReg rd,
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TCGArg a1, int ofs, int len)
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TCGReg rn, int ofs, int len)
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{
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/* sbfx */
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tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | a1
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tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | rn
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| (ofs << 7) | ((len - 1) << 16));
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}
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static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xfff || offset < -0xfff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1156,7 +1161,7 @@ static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_st32(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xfff || offset < -0xfff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1166,7 +1171,7 @@ static void tcg_out_st32(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xff || offset < -0xff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1176,7 +1181,7 @@ static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xff || offset < -0xff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1186,7 +1191,7 @@ static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_st16(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xff || offset < -0xff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1196,7 +1201,7 @@ static void tcg_out_st16(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xfff || offset < -0xfff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1206,7 +1211,7 @@ static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xff || offset < -0xff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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@ -1216,7 +1221,7 @@ static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
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}
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static void tcg_out_st8(TCGContext *s, ARMCond cond,
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int rd, int rn, int32_t offset)
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TCGReg rd, TCGReg rn, int32_t offset)
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{
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if (offset > 0xfff || offset < -0xfff) {
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tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
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