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m25p80: Allow more than four banks. 

Allow to have more than four 16MiB regions for bigger flash devices.

Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 1466755631-25201-4-git-send-email-marcin.krzeminski@nokia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Marcin Krzeminski 2016-06-27 15:37:33 +01:00 committed by Peter Maydell
parent e3ba6cd67f
commit e02b3bf263
1 changed files with 2 additions and 3 deletions
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5
hw/block/m25p80.c
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@ -129,7 +129,6 @@ typedef struct FlashPartInfo {
#define EVCFG_QUAD_IO_ENABLED (1 << 7)
#define NVCFG_4BYTE_ADDR_MASK (1 << 0)
#define NVCFG_LOWER_SEGMENT_MASK (1 << 1)
#define CFG_UPPER_128MB_SEG_ENABLED 0x3
/* Numonyx (Micron) Flag Status Register macros */
#define FSR_4BYTE_ADDR_MODE_ENABLED 0x1
@ -545,7 +544,7 @@ static void complete_collecting_data(Flash *s)
}
if (get_addr_length(s) == 3) {
s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE;
s->cur_addr += s->ear * MAX_3BYTES_SIZE;
}
s->state = STATE_IDLE;
@ -644,7 +643,7 @@ static void reset_memory(Flash *s)
s->four_bytes_address_mode = true;
}
if (!(s->nonvolatile_cfg & NVCFG_LOWER_SEGMENT_MASK)) {
s->ear = CFG_UPPER_128MB_SEG_ENABLED;
s->ear = s->size / MAX_3BYTES_SIZE - 1;
}
break;
default: