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target/i386: Added Intercept CR0 writes check 

When the selective CR0 write intercept is set, all writes to bits in
CR0 other than CR0.TS or CR0.MP cause a VMEXIT.

Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Message-Id: <20210616123907.17765-5-laramglazier@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Lara Lazier 2021-06-16 14:39:07 +02:00 committed by Paolo Bonzini
parent 498df2a747
commit e0375ec760
1 changed files with 9 additions and 0 deletions
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9
target/i386/tcg/sysemu/misc_helper.c
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@ -84,6 +84,15 @@ void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
{
switch (reg) {
case 0:
/*
* If we reach this point, the CR0 write intercept is disabled.
* But we could still exit if the hypervisor has requested the selective
* intercept for bits other than TS and MP
*/
if (cpu_svm_has_intercept(env, SVM_EXIT_CR0_SEL_WRITE) &&
((env->cr[0] ^ t0) & ~(CR0_TS_MASK | CR0_MP_MASK))) {
cpu_vmexit(env, SVM_EXIT_CR0_SEL_WRITE, 0, GETPC());
}
cpu_x86_update_cr0(env, t0);
break;
case 3: