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Actually skip over delay slot for a non-taken branch likely.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
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ths 2007-04-07 01:10:22 +00:00
parent f757d6ff29
commit e04bcc691b
1 changed files with 2 additions and 2 deletions
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4
target-mips/translate.c
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@ -1530,14 +1530,14 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc,
case OPC_BLTZALL: /* 0 < 0 likely */
gen_op_set_T0(ctx->pc + 8);
gen_op_store_T0_gpr(31);
gen_goto_tb(ctx, 0, ctx->pc + 4);
gen_goto_tb(ctx, 0, ctx->pc + 8);
return;
case OPC_BNEL: /* rx != rx likely */
case OPC_BGTZL: /* 0 > 0 likely */
case OPC_BLTZL: /* 0 < 0 likely */
/* Skip the instruction in the delay slot */
MIPS_DEBUG("bnever and skip");
gen_goto_tb(ctx, 0, ctx->pc + 4);
gen_goto_tb(ctx, 0, ctx->pc + 8);
return;
case OPC_J:
ctx->hflags |= MIPS_HFLAG_B;