tcg: Move 64-bit expanders out of line
This one is more complicated, combining 32-bit and 64-bit expansion with C if instead of preprocessor #if. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-6-richard.henderson@linaro.org>
This commit is contained in:
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09607d35f5
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e0de2f5580
@ -305,130 +305,6 @@ void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
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/* Replicate a value of size @vece from @in to all the lanes in @out */
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/* Replicate a value of size @vece from @in to all the lanes in @out */
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void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
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void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
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#if TCG_TARGET_REG_BITS == 64
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static inline void tcg_gen_discard_i64(TCGv_i64 arg)
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{
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tcg_gen_op1_i64(INDEX_op_discard, arg);
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}
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static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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if (ret != arg) {
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tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
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}
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}
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static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
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}
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static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
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}
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static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
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}
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static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
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}
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static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
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}
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static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
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}
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static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
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}
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#else /* TCG_TARGET_REG_BITS == 32 */
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void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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@ -453,16 +329,8 @@ void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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#endif /* TCG_TARGET_REG_BITS */
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void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg);
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static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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if (TCG_TARGET_HAS_neg_i64) {
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tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
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} else {
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tcg_gen_subfi_i64(ret, 0, arg);
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}
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}
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/* Size changing operations. */
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/* Size changing operations. */
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@ -473,19 +341,17 @@ void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
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void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
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void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
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void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
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void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
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void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
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void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
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void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi);
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void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
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void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
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void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
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void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
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void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
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/* 128 bit ops */
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void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
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void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset);
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void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset);
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void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset);
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void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset);
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static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
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{
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tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
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}
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/* Local load/store bit ops */
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/* Local load/store bit ops */
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void tcg_gen_qemu_ld_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
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void tcg_gen_qemu_ld_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
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231
tcg/tcg-op.c
231
tcg/tcg-op.c
@ -1503,152 +1503,238 @@ void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
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/* 64-bit ops */
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/* 64-bit ops */
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#if TCG_TARGET_REG_BITS == 32
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/* These are all inline for TCG_TARGET_REG_BITS == 64. */
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void tcg_gen_discard_i64(TCGv_i64 arg)
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void tcg_gen_discard_i64(TCGv_i64 arg)
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{
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{
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tcg_gen_discard_i32(TCGV_LOW(arg));
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_discard_i32(TCGV_HIGH(arg));
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tcg_gen_op1_i64(INDEX_op_discard, arg);
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} else {
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tcg_gen_discard_i32(TCGV_LOW(arg));
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tcg_gen_discard_i32(TCGV_HIGH(arg));
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}
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}
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}
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void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
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void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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{
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TCGTemp *ts = tcgv_i64_temp(arg);
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if (ret == arg) {
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return;
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/* Canonicalize TCGv_i64 TEMP_CONST into TCGv_i32 TEMP_CONST. */
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}
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if (ts->kind == TEMP_CONST) {
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_movi_i64(ret, ts->val);
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tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
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} else {
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} else {
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tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
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TCGTemp *ts = tcgv_i64_temp(arg);
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tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
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/* Canonicalize TCGv_i64 TEMP_CONST into TCGv_i32 TEMP_CONST. */
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if (ts->kind == TEMP_CONST) {
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tcg_gen_movi_i64(ret, ts->val);
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} else {
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tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
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tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
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}
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}
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}
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}
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}
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void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
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void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
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{
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{
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tcg_gen_movi_i32(TCGV_LOW(ret), arg);
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
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tcg_gen_mov_i64(ret, tcg_constant_i64(arg));
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} else {
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tcg_gen_movi_i32(TCGV_LOW(ret), arg);
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tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
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}
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}
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}
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void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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{
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{
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tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
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} else {
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tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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}
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}
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}
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void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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{
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{
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tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
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tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
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} else {
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tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
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tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
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}
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}
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}
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void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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{
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{
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tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
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} else {
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tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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}
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}
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}
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void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
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{
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{
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tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
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tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
|
||||||
|
tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
||||||
|
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
|
tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
||||||
|
tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
/* Since arg2 and ret have different types,
|
/*
|
||||||
they cannot be the same temporary */
|
* For 32-bit host, since arg2 and ret have different types,
|
||||||
#if HOST_BIG_ENDIAN
|
* they cannot be the same temporary -- no chance of overlap.
|
||||||
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
|
*/
|
||||||
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
#else
|
tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
|
||||||
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
} else if (HOST_BIG_ENDIAN) {
|
||||||
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
|
||||||
#endif
|
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
|
||||||
|
} else {
|
||||||
|
tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
|
||||||
|
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
|
||||||
|
} else {
|
||||||
|
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
|
||||||
{
|
{
|
||||||
#if HOST_BIG_ENDIAN
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
|
tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
|
||||||
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
|
} else if (HOST_BIG_ENDIAN) {
|
||||||
#else
|
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
|
||||||
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
|
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
|
||||||
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
} else {
|
||||||
#endif
|
tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
|
||||||
|
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
|
tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
|
||||||
|
TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
|
tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
|
||||||
|
TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
||||||
|
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
||||||
|
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
|
||||||
|
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
gen_helper_shl_i64(ret, arg1, arg2);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
gen_helper_shl_i64(ret, arg1, arg2);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
gen_helper_shr_i64(ret, arg1, arg2);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
gen_helper_shr_i64(ret, arg1, arg2);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
{
|
{
|
||||||
gen_helper_sar_i64(ret, arg1, arg2);
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
|
||||||
|
} else {
|
||||||
|
gen_helper_sar_i64(ret, arg1, arg2);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||||
@ -1656,6 +1742,12 @@ void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
|||||||
TCGv_i64 t0;
|
TCGv_i64 t0;
|
||||||
TCGv_i32 t1;
|
TCGv_i32 t1;
|
||||||
|
|
||||||
|
if (TCG_TARGET_REG_BITS == 64) {
|
||||||
|
tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
t0 = tcg_temp_ebb_new_i64();
|
t0 = tcg_temp_ebb_new_i64();
|
||||||
t1 = tcg_temp_ebb_new_i32();
|
t1 = tcg_temp_ebb_new_i32();
|
||||||
|
|
||||||
@ -1672,15 +1764,6 @@ void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
|||||||
tcg_temp_free_i32(t1);
|
tcg_temp_free_i32(t1);
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
|
||||||
|
|
||||||
void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
|
|
||||||
{
|
|
||||||
tcg_gen_mov_i64(ret, tcg_constant_i64(arg));
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* TCG_TARGET_REG_SIZE == 32 */
|
|
||||||
|
|
||||||
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
||||||
{
|
{
|
||||||
/* some cases can be optimized here */
|
/* some cases can be optimized here */
|
||||||
@ -1723,6 +1806,15 @@ void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
|
||||||
|
{
|
||||||
|
if (TCG_TARGET_HAS_neg_i64) {
|
||||||
|
tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
|
||||||
|
} else {
|
||||||
|
tcg_gen_subfi_i64(ret, 0, arg);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
||||||
{
|
{
|
||||||
if (TCG_TARGET_REG_BITS == 32) {
|
if (TCG_TARGET_REG_BITS == 32) {
|
||||||
@ -3218,6 +3310,11 @@ void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg)
|
|||||||
tcg_gen_shri_i64(hi, arg, 32);
|
tcg_gen_shri_i64(hi, arg, 32);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
|
||||||
|
{
|
||||||
|
tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
|
||||||
|
}
|
||||||
|
|
||||||
void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg)
|
void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg)
|
||||||
{
|
{
|
||||||
tcg_gen_mov_i64(lo, TCGV128_LOW(arg));
|
tcg_gen_mov_i64(lo, TCGV128_LOW(arg));
|
||||||
|
Loading…
Reference in New Issue
Block a user