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x86 queue, 2020-10-15 

Cleanups:
 * Drop x86_cpu_get_supported_feature_word() forward declaration
   (Vitaly Kuznetsov)
 * Delete kvm_allows_irq0_override() (Eduardo Habkost)
 * Correct documentation of kvm_irqchip_*() (Eduardo Habkost)
 * Fix FEATURE_HYPERV_EDX value in hyperv_passthrough case (Zhenyu Wang)
 
 Deprecation:
 * CPU model deprecation API (Robert Hoo)
 * Mark Icelake-Client CPU models deprecated (Robert Hoo)
 
 Bug fixes:
 * Remove core_id assert check in CPUID 0x8000001E (Babu Moger)
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging

x86 queue, 2020-10-15

Cleanups:
* Drop x86_cpu_get_supported_feature_word() forward declaration
  (Vitaly Kuznetsov)
* Delete kvm_allows_irq0_override() (Eduardo Habkost)
* Correct documentation of kvm_irqchip_*() (Eduardo Habkost)
* Fix FEATURE_HYPERV_EDX value in hyperv_passthrough case (Zhenyu Wang)

Deprecation:
* CPU model deprecation API (Robert Hoo)
* Mark Icelake-Client CPU models deprecated (Robert Hoo)

Bug fixes:
* Remove core_id assert check in CPUID 0x8000001E (Babu Moger)

# gpg: Signature made Thu 15 Oct 2020 17:43:58 BST
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  i386: Mark Icelake-Client CPU models deprecated
  cpu: Introduce CPU model deprecation API
  kvm: Correct documentation of kvm_irqchip_*()
  i386/kvm: Delete kvm_allows_irq0_override()
  i386/kvm: Remove IRQ routing support checks
  i386/kvm: Require KVM_CAP_IRQ_ROUTING
  target/i386: Remove core_id assert check in CPUID 0x8000001E
  i386/kvm: fix FEATURE_HYPERV_EDX value in hyperv_passthrough case
  i386: drop x86_cpu_get_supported_feature_word() forward declaration

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-10-16 22:46:28 +01:00
parent 7daf8f8d01 3e6a015cbd
commit e12ce85b2c
14 changed files with 86 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
docs/system/deprecated.rst
View File

@ -314,6 +314,12 @@ a future version of QEMU. Support for this CPU was removed from the
upstream Linux kernel, and there is no available upstream toolchain
to build binaries for it.
``Icelake-Client`` CPU Model (since 5.2.0)
''''''''''''''''''''''''''''''''''''''''''
``Icelake-Client`` CPU Models are deprecated. Use ``Icelake-Server`` CPU
Models instead.
System emulator devices
-----------------------

12
hw/core/machine.c
View File

@ -1087,6 +1087,8 @@ MemoryRegion *machine_consume_memdev(MachineState *machine,
void machine_run_board_init(MachineState *machine)
{
MachineClass *machine_class = MACHINE_GET_CLASS(machine);
ObjectClass *oc = object_class_by_name(machine->cpu_type);
CPUClass *cc;
if (machine->ram_memdev_id) {
Object *o;
@ -1106,11 +1108,10 @@ void machine_run_board_init(MachineState *machine)
* specified a CPU with -cpu check here that the user CPU is supported.
*/
if (machine_class->valid_cpu_types && machine->cpu_type) {
ObjectClass *class = object_class_by_name(machine->cpu_type);
int i;
for (i = 0; machine_class->valid_cpu_types[i]; i++) {
if (object_class_dynamic_cast(class,
if (object_class_dynamic_cast(oc,
machine_class->valid_cpu_types[i])) {
/* The user specificed CPU is in the valid field, we are
* good to go.
@ -1133,6 +1134,13 @@ void machine_run_board_init(MachineState *machine)
}
}
/* Check if CPU type is deprecated and warn if so */
cc = CPU_CLASS(oc);
if (cc && cc->deprecation_note) {
warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
cc->deprecation_note);
}
machine_class->init(machine);
}

2
hw/i386/fw_cfg.c
View File

@ -123,7 +123,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms,
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
acpi_tables, acpi_tables_len);
#endif
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));

5
hw/i386/kvm/apic.c
View File

@ -225,9 +225,8 @@ static void kvm_apic_realize(DeviceState *dev, Error **errp)
memory_region_init_io(&s->io_memory, OBJECT(s), &kvm_apic_io_ops, s,
"kvm-apic-msi", APIC_SPACE_SIZE);
if (kvm_has_gsi_routing()) {
msi_nonbroken = true;
}
assert(kvm_has_gsi_routing());
msi_nonbroken = true;
}
static void kvm_apic_unrealize(DeviceState *dev)

37
hw/i386/kvm/ioapic.c
View File

@ -25,27 +25,26 @@ void kvm_pc_setup_irq_routing(bool pci_enabled)
KVMState *s = kvm_state;
int i;
if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
for (i = 0; i < 8; ++i) {
if (i == 2) {
continue;
}
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
assert(kvm_has_gsi_routing());
for (i = 0; i < 8; ++i) {
if (i == 2) {
continue;
}
for (i = 8; i < 16; ++i) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
}
if (pci_enabled) {
for (i = 0; i < 24; ++i) {
if (i == 0) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
} else if (i != 2) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
}
}
}
kvm_irqchip_commit_routes(s);
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
}
for (i = 8; i < 16; ++i) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
}
if (pci_enabled) {
for (i = 0; i < 24; ++i) {
if (i == 0) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
} else if (i != 2) {
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
}
}
}
kvm_irqchip_commit_routes(s);
}
typedef struct KVMIOAPICState KVMIOAPICState;

2
hw/i386/microvm.c
View File

@ -290,7 +290,7 @@ static void microvm_memory_init(MicrovmMachineState *mms)
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,

2
hw/i386/pc.c
View File

@ -827,7 +827,7 @@ void pc_guest_info_init(PCMachineState *pcms)
MachineState *ms = MACHINE(pcms);
X86MachineState *x86ms = X86_MACHINE(pcms);
x86ms->apic_xrupt_override = kvm_allows_irq0_override();
x86ms->apic_xrupt_override = true;
pcms->numa_nodes = ms->numa_state->num_nodes;
pcms->node_mem = g_malloc0(pcms->numa_nodes *
sizeof *pcms->node_mem);

3
include/hw/core/cpu.h
View File

@ -155,6 +155,8 @@ struct TranslationBlock;
* @disas_set_info: Setup architecture specific components of disassembly info
* @adjust_watchpoint_address: Perform a target-specific adjustment to an
* address before attempting to match it against watchpoints.
* @deprecation_note: If this CPUClass is deprecated, this field provides
* related information.
*
* Represents a CPU family or model.
*/
@ -221,6 +223,7 @@ struct CPUClass {
vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
void (*tcg_initialize)(void);
const char *deprecation_note;
/* Keep non-pointer data at the end to minimize holes. */
int gdb_num_core_regs;
bool gdb_stop_before_watchpoint;

19
include/sysemu/kvm.h
View File

@ -51,23 +51,22 @@ extern bool kvm_msi_use_devid;
/**
* kvm_irqchip_in_kernel:
*
* Returns: true if the user asked us to create an in-kernel
* irqchip via the "kernel_irqchip=on" machine option.
* Returns: true if an in-kernel irqchip was created.
* What this actually means is architecture and machine model
* specific: on PC, for instance, it means that the LAPIC,
* IOAPIC and PIT are all in kernel. This function should never
* be used from generic target-independent code: use one of the
* following functions or some other specific check instead.
* specific: on PC, for instance, it means that the LAPIC
* is in kernel. This function should never be used from generic
* target-independent code: use one of the following functions or
* some other specific check instead.
*/
#define kvm_irqchip_in_kernel() (kvm_kernel_irqchip)
/**
* kvm_irqchip_is_split:
*
* Returns: true if the user asked us to split the irqchip
* implementation between user and kernel space. The details are
* architecture and machine specific. On PC, it means that the PIC,
* IOAPIC, and PIT are in user space while the LAPIC is in the kernel.
* Returns: true if the irqchip implementation is split between
* user and kernel space. The details are architecture and
* machine specific. On PC, it means that the PIC, IOAPIC, and
* PIT are in user space while the LAPIC is in the kernel.
*/
#define kvm_irqchip_is_split() (kvm_split_irqchip)

7
qapi/machine-target.json
View File

@ -286,6 +286,10 @@
# in the VM configuration, because aliases may stop being
# migration-safe in the future (since 4.1)
#
# @deprecated: If true, this CPU model is deprecated and may be removed in
# in some future version of QEMU according to the QEMU deprecation
# policy. (since 5.2)
#
# @unavailable-features is a list of QOM property names that
# represent CPU model attributes that prevent the CPU from running.
# If the QOM property is read-only, that means there's no known
@ -310,7 +314,8 @@
'static': 'bool',
'*unavailable-features': [ 'str' ],
'typename': 'str',
'*alias-of' : 'str' },
'*alias-of' : 'str',
'deprecated' : 'bool' },
'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }
##

32
target/i386/cpu.c
View File

@ -1633,6 +1633,7 @@ typedef struct X86CPUDefinition {
* If NULL, version 1 will be registered automatically.
*/
const X86CPUVersionDefinition *versions;
const char *deprecation_note;
} X86CPUDefinition;
/* Reference to a specific CPU model version */
@ -3357,10 +3358,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x80000008,
.model_id = "Intel Core Processor (Icelake)",
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
{
.version = 1,
.note = "deprecated"
},
{
.version = 2,
.note = "no TSX",
.note = "no TSX, deprecated",
.alias = "Icelake-Client-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@ -3369,7 +3373,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
},
},
{ /* end of list */ }
}
},
.deprecation_note = "use Icelake-Server instead"
},
{
.name = "Icelake-Server",
@ -4180,9 +4185,6 @@ void x86_cpu_change_kvm_default(const char *prop, const char *value)
assert(pv->prop);
}
static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
bool migratable_only);
static bool lmce_supported(void)
{
uint64_t mce_cap = 0;
@ -4993,6 +4995,11 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data)
info->migration_safe = cc->migration_safe;
info->has_migration_safe = true;
info->q_static = cc->static_model;
if (cc->model && cc->model->cpudef->deprecation_note) {
info->deprecated = true;
} else {
info->deprecated = false;
}
/*
* Old machine types won't report aliases, so that alias translation
* doesn't break compatibility with previous QEMU versions.
@ -5383,9 +5390,11 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
{
X86CPUModel *model = data;
X86CPUClass *xcc = X86_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc);
xcc->model = model;
xcc->migration_safe = true;
cc->deprecation_note = model->cpudef->deprecation_note;
}
static void x86_register_cpu_model_type(const char *name, X86CPUModel *model)
@ -5913,9 +5922,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
}
break;
case 0x8000001E:
assert(cpu->core_id <= 255);
encode_topo_cpuid8000001e(cpu, &topo_info,
eax, ebx, ecx, edx);
if (cpu->core_id <= 255) {
encode_topo_cpuid8000001e(cpu, &topo_info, eax, ebx, ecx, edx);
} else {
*eax = 0;
*ebx = 0;
*ecx = 0;
*edx = 0;
}
break;
case 0xC0000000:
*eax = env->cpuid_xlevel2;

5
target/i386/kvm-stub.c
View File

@ -13,11 +13,6 @@
#include "cpu.h"
#include "kvm_i386.h"
bool kvm_allows_irq0_override(void)
{
return 1;
}
#ifndef __OPTIMIZE__
bool kvm_has_smm(void)
{

19
target/i386/kvm.c
View File

@ -154,11 +154,6 @@ bool kvm_has_exception_payload(void)
return has_exception_payload;
}
bool kvm_allows_irq0_override(void)
{
return !kvm_irqchip_in_kernel() || kvm_has_gsi_routing();
}
static bool kvm_x2apic_api_set_flags(uint64_t flags)
{
KVMState *s = KVM_STATE(current_accel());
@ -1214,7 +1209,7 @@ static int hyperv_handle_properties(CPUState *cs,
if (c) {
env->features[FEAT_HYPERV_EAX] = c->eax;
env->features[FEAT_HYPERV_EBX] = c->ebx;
env->features[FEAT_HYPERV_EDX] = c->eax;
env->features[FEAT_HYPERV_EDX] = c->edx;
}
c = cpuid_find_entry(cpuid, HV_CPUID_ENLIGHTMENT_INFO, 0);
if (c) {
@ -2114,6 +2109,11 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
int ret;
struct utsname utsname;
if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
error_report("kvm: KVM_CAP_IRQ_ROUTING not supported by KVM");
return -ENOTSUP;
}
has_xsave = kvm_check_extension(s, KVM_CAP_XSAVE);
has_xcrs = kvm_check_extension(s, KVM_CAP_XCRS);
has_pit_state2 = kvm_check_extension(s, KVM_CAP_PIT_STATE2);
@ -4547,13 +4547,6 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
void kvm_arch_init_irq_routing(KVMState *s)
{
if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
/* If kernel can't do irq routing, interrupt source
* override 0->2 cannot be set up as required by HPET.
* So we have to disable it.
*/
no_hpet = 1;
}
/* We know at this point that we're using the in-kernel
* irqchip, so we can use irqfds, and on x86 we know
* we can use msi via irqfd and GSI routing.

1
target/i386/kvm_i386.h
View File

@ -32,7 +32,6 @@
#endif /* CONFIG_KVM */
bool kvm_allows_irq0_override(void);
bool kvm_has_smm(void);
bool kvm_has_adjust_clock(void);
bool kvm_has_adjust_clock_stable(void);