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target-arm/translate-a64.c: Correct unallocated checks for ldst_excl

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The checks for the unallocated encodings in the ldst_excl group
(exclusives and load-acquire/store-release) were not correct. This
error meant that in turn we ended up with code attempting to handle
the non-existent case of "non-exclusive load-acquire/store-release
pair". Delete that broken and now unreachable code.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
This commit is contained in:
Peter Maydell 2015-11-24 14:12:15 +00:00
parent 6109769a8b
commit e14f0eb12f
1 changed files with 2 additions and 13 deletions
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15
target-arm/translate-a64.c
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@ -1816,9 +1816,6 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
* o2: 0 -> exclusive, 1 -> not * o2: 0 -> exclusive, 1 -> not
* o1: 0 -> single register, 1 -> register pair * o1: 0 -> single register, 1 -> register pair
* o0: 1 -> load-acquire/store-release, 0 -> not * o0: 1 -> load-acquire/store-release, 0 -> not
*
* o0 == 0 AND o2 == 1 is un-allocated
* o1 == 1 is un-allocated except for 32 and 64 bit sizes
*/ */
static void disas_ldst_excl(DisasContext *s, uint32_t insn) static void disas_ldst_excl(DisasContext *s, uint32_t insn)
{ {
@ -1833,7 +1830,8 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
int size = extract32(insn, 30, 2); int size = extract32(insn, 30, 2);
TCGv_i64 tcg_addr; TCGv_i64 tcg_addr;
if ((!is_excl && !is_lasr) || if ((!is_excl && !is_pair && !is_lasr) ||
(!is_excl && is_pair) ||
(is_pair && size < 2)) { (is_pair && size < 2)) {
unallocated_encoding(s); unallocated_encoding(s);
return; return;
@ -1862,15 +1860,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
} else { } else {
do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false); do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
} }
if (is_pair) {
TCGv_i64 tcg_rt2 = cpu_reg(s, rt);
tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
if (is_store) {
do_gpr_st(s, tcg_rt2, tcg_addr, size);
} else {
do_gpr_ld(s, tcg_rt2, tcg_addr, size, false, false);
}
}
} }
} }