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hw/timer/m48t59: Convert debug printf()s to trace events

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Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Message-Id: <20200117165809.31067-3-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Philippe Mathieu-Daudé 2020-01-17 17:58:09 +01:00 committed by Laurent Vivier
parent aff55693d0
commit e21d73ec7f
3 changed files with 11 additions and 11 deletions
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5
hw/rtc/m48t59-internal.h
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@ -26,11 +26,6 @@
#ifndef HW_M48T59_INTERNAL_H #ifndef HW_M48T59_INTERNAL_H
#define HW_M48T59_INTERNAL_H #define HW_M48T59_INTERNAL_H
#define M48T59_DEBUG 0
#define NVRAM_PRINTF(fmt, ...) do { \
if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
/* /*
* The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
* alarm and a watchdog timer and related control registers. In the * alarm and a watchdog timer and related control registers. In the

11
hw/rtc/m48t59.c
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@ -35,6 +35,7 @@
#include "exec/address-spaces.h" #include "exec/address-spaces.h"
#include "qemu/bcd.h" #include "qemu/bcd.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "trace.h"
#include "m48t59-internal.h" #include "m48t59-internal.h"
#include "migration/vmstate.h" #include "migration/vmstate.h"
@ -192,8 +193,7 @@ void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val)
struct tm tm; struct tm tm;
int tmp; int tmp;
if (addr > 0x1FF8 && addr < 0x2000) trace_m48txx_nvram_mem_write(addr, val);
NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
/* check for NVRAM access */ /* check for NVRAM access */
if ((NVRAM->model == 2 && addr < 0x7f8) || if ((NVRAM->model == 2 && addr < 0x7f8) ||
@ -450,8 +450,7 @@ uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr)
} }
break; break;
} }
if (addr > 0x1FF9 && addr < 0x2000) trace_m48txx_nvram_mem_read(addr, retval);
NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval);
return retval; return retval;
} }
@ -462,7 +461,7 @@ static void NVRAM_writeb(void *opaque, hwaddr addr, uint64_t val,
{ {
M48t59State *NVRAM = opaque; M48t59State *NVRAM = opaque;
NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val); trace_m48txx_nvram_io_write(addr, val);
switch (addr) { switch (addr) {
case 0: case 0:
NVRAM->addr &= ~0x00FF; NVRAM->addr &= ~0x00FF;
@ -494,7 +493,7 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
retval = -1; retval = -1;
break; break;
} }
NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval); trace_m48txx_nvram_io_read(addr, retval);
return retval; return retval;
} }

6
hw/rtc/trace-events
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@ -17,3 +17,9 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
# aspeed-rtc.c # aspeed-rtc.c
aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
# m48t59.c
m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"