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New qdev_init_nofail()

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Like qdev_init(), but terminate program via hw_error() instead of
returning an error value.

Use it instead of qdev_init() where terminating the program on failure
is okay, either because it's during machine construction, or because
we know that failure can't happen.

Because relying in the latter is somewhat unclean, and the former is
not always obvious, it would be nice to go back to qdev_init() in the
not-so-obvious cases, only with proper error handling.  I'm leaving
that for another day, because it involves making sure that error
values are properly checked by all callers.

Patchworks-ID: 35168
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Markus Armbruster 2009-10-07 01:15:58 +02:00 committed by Anthony Liguori
parent 33e66b86d8
commit e23a1b33b5
34 changed files with 72 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/apb_pci.c
View File

@ -236,7 +236,7 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
/* Ultrasparc PBM main bus */
dev = qdev_create(NULL, "pbm");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
/* apb_config */
sysbus_mmio_map(s, 0, special_base + 0x2000ULL);

2
hw/arm_sysctl.c
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@ -212,7 +212,7 @@ void arm_sysctl_init(uint32_t base, uint32_t sys_id)
dev = qdev_create(NULL, "realview_sysctl");
qdev_prop_set_uint32(dev, "sys_id", sys_id);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
}

6
hw/armv7m.c
View File

@ -141,12 +141,12 @@ static void armv7m_bitband_init(void)
dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x20000000);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x40000000);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
}
@ -202,7 +202,7 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
nvic = qdev_create(NULL, "armv7m_nvic");
env->v7m.nvic = nvic;
qdev_init(nvic);
qdev_init_nofail(nvic);
cpu_pic = arm_pic_init_cpu(env);
sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
for (i = 0; i < 64; i++) {

2
hw/axis_dev88.c
View File

@ -300,7 +300,7 @@ void axisdev88_init (ram_addr_t ram_size,
dev = qdev_create(NULL, "etraxfs,pic");
/* FIXME: Is there a proper way to signal vectors to the CPU core? */
qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, 0x3001c000);
sysbus_connect_irq(s, 0, cpu_irq[0]);

4
hw/escc.c
View File

@ -741,7 +741,7 @@ int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
qdev_prop_set_chr(dev, "chrA", chrA);
qdev_prop_set_uint32(dev, "chnBtype", ser);
qdev_prop_set_uint32(dev, "chnAtype", ser);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irqB);
sysbus_connect_irq(s, 1, irqA);
@ -904,7 +904,7 @@ void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq,
qdev_prop_set_chr(dev, "chrA", NULL);
qdev_prop_set_uint32(dev, "chnBtype", mouse);
qdev_prop_set_uint32(dev, "chnAtype", kbd);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_connect_irq(s, 1, irq);

2
hw/esp.c
View File

@ -647,7 +647,7 @@ void esp_init(target_phys_addr_t espaddr, int it_shift,
esp->dma_memory_write = dma_memory_write;
esp->dma_opaque = dma_opaque;
esp->it_shift = it_shift;
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, espaddr);

2
hw/etraxfs.c
View File

@ -92,7 +92,7 @@ void bareetraxfs_init (ram_addr_t ram_size,
dev = qdev_create(NULL, "etraxfs,pic");
/* FIXME: Is there a proper way to signal vectors to the CPU core? */
qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, 0x3001c000);
sysbus_connect_irq(s, 0, cpu_irq[0]);

6
hw/fdc.c
View File

@ -1866,8 +1866,7 @@ fdctrl_t *fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
fdctrl->dma_chann = dma_chann; /* FIXME */
qdev_prop_set_drive(dev, "driveA", fds[0]);
qdev_prop_set_drive(dev, "driveB", fds[1]);
if (qdev_init(dev) != 0)
return NULL;
qdev_init_nofail(dev);
sysbus_connect_irq(&sys->busdev, 0, irq);
sysbus_mmio_map(&sys->busdev, 0, mmio_base);
@ -1883,8 +1882,7 @@ fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
dev = qdev_create(NULL, "SUNW,fdtwo");
qdev_prop_set_drive(dev, "drive", fds[0]);
if (qdev_init(dev) != 0)
return NULL;
qdev_init_nofail(dev);
sys = DO_UPCAST(fdctrl_sysbus_t, busdev.qdev, dev);
fdctrl = &sys->state;
sysbus_connect_irq(&sys->busdev, 0, irq);

2
hw/grackle_pci.c
View File

@ -138,7 +138,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
GrackleState *d;
dev = qdev_create(NULL, "grackle");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
d = FROM_SYSBUS(GrackleState, s);
d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",

2
hw/i2c.c
View File

@ -189,6 +189,6 @@ DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr)
dev = qdev_create(&bus->qbus, name);
qdev_prop_set_uint8(dev, "address", addr);
qdev_init(dev);
qdev_init_nofail(dev);
return dev;
}

2
hw/ide/pci.c
View File

@ -445,7 +445,7 @@ void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
dev = pci_create(bus, -1, "CMD646 IDE");
qdev_prop_set_uint32(&dev->qdev, "secondary", secondary_ide_enabled);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
pci_ide_create_devs(dev, hd_table);
}

2
hw/integratorcp.c
View File

@ -477,7 +477,7 @@ static void integratorcp_init(ram_addr_t ram_size,
dev = qdev_create(NULL, "integrator_core");
qdev_prop_set_uint32(dev, "memsz", ram_size >> 20);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);
cpu_pic = arm_pic_init_cpu(env);

2
hw/isa-bus.c
View File

@ -45,7 +45,7 @@ ISABus *isa_bus_new(DeviceState *dev)
}
if (NULL == dev) {
dev = qdev_create(NULL, "isabus-bridge");
qdev_init(dev);
qdev_init_nofail(dev);
}
isabus = FROM_QBUS(ISABus, qbus_create(&isa_bus_info, dev, NULL));

4
hw/m48t59.c
View File

@ -636,7 +636,7 @@ m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
qdev_prop_set_uint32(dev, "type", type);
qdev_prop_set_uint32(dev, "size", size);
qdev_prop_set_uint32(dev, "io_base", io_base);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, IRQ);
if (io_base != 0) {
@ -662,7 +662,7 @@ m48t59_t *m48t59_init_isa(uint32_t io_base, uint16_t size, int type)
qdev_prop_set_uint32(&dev->qdev, "type", type);
qdev_prop_set_uint32(&dev->qdev, "size", size);
qdev_prop_set_uint32(&dev->qdev, "io_base", io_base);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
d = DO_UPCAST(M48t59ISAState, busdev, dev);
s = &d->state;

2
hw/mc146818rtc.c
View File

@ -637,7 +637,7 @@ RTCState *rtc_init(int base_year)
dev = isa_create("mc146818rtc");
qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
return DO_UPCAST(RTCState, dev, dev);
}

2
hw/mips_malta.c
View File

@ -933,7 +933,7 @@ void mips_malta_init (ram_addr_t ram_size,
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
qdev_init_nofail(eeprom);
}
pit = pit_init(0x40, isa_reserve_irq(0));
DMA_init(0);

4
hw/musicpal.c
View File

@ -1551,7 +1551,7 @@ static void musicpal_init(ram_addr_t ram_size,
qemu_check_nic_model(&nd_table[0], "mv88w8618");
dev = qdev_create(NULL, "mv88w8618_eth");
dev->nd = &nd_table[0];
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, MP_ETH_BASE);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[MP_ETH_IRQ]);
@ -1589,7 +1589,7 @@ static void musicpal_init(ram_addr_t ram_size,
dev = qdev_create(NULL, "mv88w8618_audio");
s = sysbus_from_qdev(dev);
qdev_prop_set_ptr(dev, "wm8750", wm8750_dev);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
#endif

2
hw/ne2000-isa.c
View File

@ -87,7 +87,7 @@ void isa_ne2000_init(int base, int irq, NICInfo *nd)
dev->qdev.nd = nd; /* hack alert */
qdev_prop_set_uint32(&dev->qdev, "iobase", base);
qdev_prop_set_uint32(&dev->qdev, "irq", irq);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
}
static ISADeviceInfo ne2000_isa_info = {

2
hw/pc.c
View File

@ -1294,7 +1294,7 @@ static void pc_init1(ram_addr_t ram_size,
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
qdev_init_nofail(eeprom);
}
piix4_acpi_system_hot_add_init(pci_bus);
}

4
hw/pci.c
View File

@ -946,7 +946,7 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
dev = pci_create(bus, devfn, "pci-bridge");
qdev_prop_set_uint32(&dev->qdev, "vendorid", vid);
qdev_prop_set_uint32(&dev->qdev, "deviceid", did);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
s = DO_UPCAST(PCIBridge, dev, dev);
pci_register_secondary_bus(&s->bus, &s->dev, map_irq, name);
@ -1010,7 +1010,7 @@ PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name)
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name)
{
PCIDevice *dev = pci_create(bus, devfn, name);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
return dev;
}

2
hw/piix_pci.c
View File

@ -234,7 +234,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *
s = FROM_SYSBUS(I440FXState, sysbus_from_qdev(dev));
b = pci_bus_new(&s->busdev.qdev, NULL, 0);
s->bus = b;
qdev_init(dev);
qdev_init_nofail(dev);
d = pci_create_simple(b, 0, "i440FX");
*pi440fx_state = DO_UPCAST(PCII440FXState, dev, d);

15
hw/qdev.c
View File

@ -269,6 +269,21 @@ int qdev_simple_unplug_cb(DeviceState *dev)
return 0;
}
/* Like qdev_init(), but terminate program via hw_error() instead of
returning an error value. This is okay during machine creation.
Don't use for hotplug, because there callers need to recover from
failure. Exception: if you know the device's init() callback can't
fail, then qdev_init_nofail() can't fail either, and is therefore
usable even then. But relying on the device implementation that
way is somewhat unclean, and best avoided. */
void qdev_init_nofail(DeviceState *dev)
{
DeviceInfo *info = dev->info;
if (qdev_init(dev) < 0)
hw_error("Initialization of device %s failed\n", info->name);
}
/* Unlink device from bus and free the structure. */
void qdev_free(DeviceState *dev)
{

1
hw/qdev.h
View File

@ -101,6 +101,7 @@ struct CompatProperty {
DeviceState *qdev_create(BusState *bus, const char *name);
DeviceState *qdev_device_add(QemuOpts *opts);
int qdev_init(DeviceState *dev);
void qdev_init_nofail(DeviceState *dev);
int qdev_unplug(DeviceState *dev);
void qdev_free(DeviceState *dev);
int qdev_simple_unplug_cb(DeviceState *dev);

2
hw/smc91c111.c
View File

@ -735,7 +735,7 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)
qemu_check_nic_model(nd, "smc91c111");
dev = qdev_create(NULL, "smc91c111");
dev->nd = nd;
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, base);
sysbus_connect_irq(s, 0, irq);

2
hw/ssi.c
View File

@ -46,7 +46,7 @@ DeviceState *ssi_create_slave(SSIBus *bus, const char *name)
{
DeviceState *dev;
dev = qdev_create(&bus->qbus, name);
qdev_init(dev);
qdev_init_nofail(dev);
return dev;
}

2
hw/stellaris.c
View File

@ -1384,7 +1384,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
enet = qdev_create(NULL, "stellaris_enet");
enet->nd = &nd_table[0];
qdev_init(enet);
qdev_init_nofail(enet);
sysbus_mmio_map(sysbus_from_qdev(enet), 0, 0x40048000);
sysbus_connect_irq(sysbus_from_qdev(enet), 0, pic[42]);
}

28
hw/sun4m.c
View File

@ -359,7 +359,7 @@ static void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq)
dev = qdev_create(NULL, "iommu");
qdev_prop_set_uint32(dev, "version", version);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, addr);
@ -375,7 +375,7 @@ static void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq,
dev = qdev_create(NULL, "sparc32_dma");
qdev_prop_set_ptr(dev, "iommu_opaque", iommu);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, parent_irq);
*dev_irq = qdev_get_gpio_in(dev, 0);
@ -396,7 +396,7 @@ static void lance_init(NICInfo *nd, target_phys_addr_t leaddr,
dev = qdev_create(NULL, "lance");
dev->nd = nd;
qdev_prop_set_ptr(dev, "dma", dma_opaque);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, leaddr);
sysbus_connect_irq(s, 0, irq);
@ -413,7 +413,7 @@ static DeviceState *slavio_intctl_init(target_phys_addr_t addr,
unsigned int i, j;
dev = qdev_create(NULL, "slavio_intctl");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
@ -442,7 +442,7 @@ static void slavio_timer_init_all(target_phys_addr_t addr, qemu_irq master_irq,
dev = qdev_create(NULL, "slavio_timer");
qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, master_irq);
sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);
@ -468,7 +468,7 @@ static void slavio_misc_init(target_phys_addr_t base,
SysBusDevice *s;
dev = qdev_create(NULL, "slavio_misc");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
if (base) {
/* 8 bit registers */
@ -505,7 +505,7 @@ static void ecc_init(target_phys_addr_t base, qemu_irq irq, uint32_t version)
dev = qdev_create(NULL, "eccmemctl");
qdev_prop_set_uint32(dev, "version", version);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, base);
@ -520,7 +520,7 @@ static void apc_init(target_phys_addr_t power_base, qemu_irq cpu_halt)
SysBusDevice *s;
dev = qdev_create(NULL, "apc");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
/* Power management (APC) XXX: not a Slavio device */
sysbus_mmio_map(s, 0, power_base);
@ -539,7 +539,7 @@ static void tcx_init(target_phys_addr_t addr, int vram_size, int width,
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
/* 8-bit plane */
sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
@ -569,7 +569,7 @@ static void idreg_init(target_phys_addr_t addr)
SysBusDevice *s;
dev = qdev_create(NULL, "macio_idreg");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, addr);
@ -607,7 +607,7 @@ static void prom_init(target_phys_addr_t addr, const char *bios_name)
int ret;
dev = qdev_create(NULL, "openprom");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, addr);
@ -697,7 +697,7 @@ static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size,
d = FROM_SYSBUS(RamDevice, s);
d->size = RAM_size;
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(s, 0, addr);
}
@ -1344,7 +1344,7 @@ static DeviceState *sbi_init(target_phys_addr_t addr, qemu_irq **parent_irq)
unsigned int i;
dev = qdev_create(NULL, "sbi");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
@ -1534,7 +1534,7 @@ static DeviceState *sun4c_intctl_init(target_phys_addr_t addr,
unsigned int i;
dev = qdev_create(NULL, "sun4c_intctl");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);

4
hw/sun4u.c
View File

@ -415,7 +415,7 @@ static void prom_init(target_phys_addr_t addr, const char *bios_name)
int ret;
dev = qdev_create(NULL, "openprom");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, addr);
@ -498,7 +498,7 @@ static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size)
d = FROM_SYSBUS(RamDevice, s);
d->size = RAM_size;
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(s, 0, addr);
}

4
hw/syborg.c
View File

@ -65,7 +65,7 @@ static void syborg_init(ram_addr_t ram_size,
dev = qdev_create(NULL, "syborg,timer");
qdev_prop_set_uint32(dev, "frequency", 1000000);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xC0002000);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[1]);
@ -84,7 +84,7 @@ static void syborg_init(ram_addr_t ram_size,
qemu_check_nic_model(&nd_table[0], "virtio");
dev = qdev_create(NULL, "syborg,virtio-net");
dev->nd = &nd_table[0];
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_mmio_map(s, 0, 0xc000c000);
sysbus_connect_irq(s, 0, pic[9]);

2
hw/sysbus.c
View File

@ -143,7 +143,7 @@ DeviceState *sysbus_create_varargs(const char *name,
dev = qdev_create(NULL, name);
s = sysbus_from_qdev(dev);
qdev_init(dev);
qdev_init_nofail(dev);
if (addr != (target_phys_addr_t)-1) {
sysbus_mmio_map(s, 0, addr);
}

2
hw/unin_pci.c
View File

@ -253,7 +253,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
/* Use values found on a real PowerMac */
/* Uninorth main bus */
dev = qdev_create(NULL, "Uni-north main");
qdev_init(dev);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
d = FROM_SYSBUS(UNINState, s);
d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",

2
hw/usb-bus.c
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@ -101,7 +101,7 @@ USBDevice *usb_create(USBBus *bus, const char *name)
USBDevice *usb_create_simple(USBBus *bus, const char *name)
{
USBDevice *dev = usb_create(bus, name);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
return dev;
}

2
hw/vga-pci.c
View File

@ -128,7 +128,7 @@ int pci_vga_init(PCIBus *bus,
dev = pci_create(bus, -1, "VGA");
qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset);
qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_offset);
qdev_init(&dev->qdev);
qdev_init_nofail(&dev->qdev);
return 0;
}

6
hw/xilinx.h
View File

@ -9,7 +9,7 @@ xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
dev = qdev_create(NULL, "xilinx,intc");
qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
@ -24,7 +24,7 @@ xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq)
dev = qdev_create(NULL, "xilinx,timer");
qdev_prop_set_uint32(dev, "nr-timers", nr);
qdev_prop_set_uint32(dev, "frequency", freq);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
@ -43,7 +43,7 @@ xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
dev->nd = nd;
qdev_prop_set_uint32(dev, "txpingpong", txpingpong);
qdev_prop_set_uint32(dev, "rxpingpong", rxpingpong);
qdev_init(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;