From e23ae617f68420248a978c1040686658a34a7f95 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 17:38:51 +0400 Subject: [PATCH] leon3: use qdev gpio facilities for the PIL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As Peter Maydell once said: "Creating a gpio pin on some object that isn't yourself looks a bit odd, but all this leon3 code is modifying the CPU object from the outside anyway. Someday we might tidy it up, but not today." Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 6 ++++-- target/sparc/cpu.h | 1 - 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index cac987373e..8038887ff7 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -230,8 +230,10 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); - qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, + env, "pil", 1); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, + qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index e70fec0133..ae97c7d9f7 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -541,7 +541,6 @@ struct CPUSPARCState { #endif sparc_def_t def; - qemu_irq pil_irq; void *irq_manager; void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno);