tcg: Add mmu helpers that take a return address argument
Allow the code that tcg generates to be less obtuse, passing in the return address directly instead of computing it in the helper. Maintain the old entrance point unchanged as an alternate entry point. Delete the helper_st*_cmmu prototypes; the implementations did not exist. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
c6f29ff096
commit
e25c3887e6
@ -9,29 +9,41 @@
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#ifndef SOFTMMU_DEFS_H
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#define SOFTMMU_DEFS_H
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uint8_t helper_ret_ldb_mmu(CPUArchState *env, target_ulong addr,
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int mmu_idx, uintptr_t retaddr);
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uint16_t helper_ret_ldw_mmu(CPUArchState *env, target_ulong addr,
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int mmu_idx, uintptr_t retaddr);
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uint32_t helper_ret_ldl_mmu(CPUArchState *env, target_ulong addr,
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int mmu_idx, uintptr_t retaddr);
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uint64_t helper_ret_ldq_mmu(CPUArchState *env, target_ulong addr,
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int mmu_idx, uintptr_t retaddr);
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void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
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int mmu_idx, uintptr_t retaddr);
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void helper_ret_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
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int mmu_idx, uintptr_t retaddr);
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void helper_ret_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
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int mmu_idx, uintptr_t retaddr);
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void helper_ret_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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int mmu_idx, uintptr_t retaddr);
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uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
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int mmu_idx);
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uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
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int mmu_idx);
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uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
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int mmu_idx);
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uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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int mmu_idx);
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void helper_stb_mmu(CPUArchState *env, target_ulong addr,
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uint8_t val, int mmu_idx);
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void helper_stw_mmu(CPUArchState *env, target_ulong addr,
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uint16_t val, int mmu_idx);
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void helper_stl_mmu(CPUArchState *env, target_ulong addr,
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uint32_t val, int mmu_idx);
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void helper_stq_mmu(CPUArchState *env, target_ulong addr,
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uint64_t val, int mmu_idx);
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uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stb_cmmu(CPUArchState *env, target_ulong addr, uint8_t val,
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int mmu_idx);
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uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stw_cmmu(CPUArchState *env, target_ulong addr, uint16_t val,
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int mmu_idx);
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uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stl_cmmu(CPUArchState *env, target_ulong addr, uint32_t val,
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int mmu_idx);
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uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stq_cmmu(CPUArchState *env, target_ulong addr, uint64_t val,
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int mmu_idx);
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#endif
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#endif /* SOFTMMU_DEFS_H */
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@ -78,15 +78,18 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
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}
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/* handle all cases except unaligned access which span two pages */
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#ifdef SOFTMMU_CODE_ACCESS
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static
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#endif
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DATA_TYPE
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glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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int mmu_idx)
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glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong addr, int mmu_idx,
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uintptr_t retaddr)
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{
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DATA_TYPE res;
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int index;
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target_ulong tlb_addr;
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hwaddr ioaddr;
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uintptr_t retaddr;
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/* test if there is match for unaligned or IO access */
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/* XXX: could done more in memory macro in a non portable way */
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@ -98,13 +101,11 @@ glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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/* IO access */
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if ((addr & (DATA_SIZE - 1)) != 0)
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goto do_unaligned_access;
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retaddr = GETPC_EXT();
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ioaddr = env->iotlb[mmu_idx][index];
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res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr);
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} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
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/* slow unaligned access (it spans two pages or IO) */
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do_unaligned_access:
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retaddr = GETPC_EXT();
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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#endif
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@ -115,7 +116,6 @@ glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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uintptr_t addend;
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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retaddr = GETPC_EXT();
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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}
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#endif
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@ -124,8 +124,6 @@ glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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(addr + addend));
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}
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} else {
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/* the page is not in the TLB : fill it */
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retaddr = GETPC_EXT();
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0)
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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@ -136,6 +134,14 @@ glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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return res;
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}
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DATA_TYPE
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glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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int mmu_idx)
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{
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return glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx,
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GETPC_EXT());
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}
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/* handle all unaligned cases */
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static DATA_TYPE
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glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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@ -214,13 +220,13 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
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io_mem_write(mr, physaddr, val, 1 << SHIFT);
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}
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void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong addr, DATA_TYPE val,
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int mmu_idx)
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void
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glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong addr, DATA_TYPE val,
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int mmu_idx, uintptr_t retaddr)
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{
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hwaddr ioaddr;
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target_ulong tlb_addr;
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uintptr_t retaddr;
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int index;
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index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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@ -231,12 +237,10 @@ void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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/* IO access */
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if ((addr & (DATA_SIZE - 1)) != 0)
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goto do_unaligned_access;
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retaddr = GETPC_EXT();
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ioaddr = env->iotlb[mmu_idx][index];
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glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr);
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} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
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do_unaligned_access:
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retaddr = GETPC_EXT();
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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#endif
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@ -247,7 +251,6 @@ void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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uintptr_t addend;
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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retaddr = GETPC_EXT();
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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}
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#endif
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@ -257,7 +260,6 @@ void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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}
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} else {
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/* the page is not in the TLB : fill it */
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retaddr = GETPC_EXT();
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0)
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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@ -267,6 +269,14 @@ void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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}
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}
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void
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glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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DATA_TYPE val, int mmu_idx)
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{
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glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, val, mmu_idx,
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GETPC_EXT());
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}
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/* handles all unaligned cases */
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static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong addr,
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