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target/avr: CPU class: Add memory management support 

This patch introduces three memory-management-related functions
that will become part of AVR CPU class object.

[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-5-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Michael Rolnik 2020-02-06 23:08:31 +01:00 committed by Philippe Mathieu-Daudé
parent 7ccda78ff3
commit e2a2b0b918
2 changed files with 53 additions and 0 deletions
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3
target/avr/cpu.c
View File

@ -203,6 +203,9 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->cpu_exec_interrupt = avr_cpu_exec_interrupt;
cc->dump_state = avr_cpu_dump_state;
cc->set_pc = avr_cpu_set_pc;
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
cc->tlb_fill = avr_cpu_tlb_fill;
cc->disas_set_info = avr_cpu_disas_set_info;
cc->tcg_initialize = avr_cpu_tcg_init;
cc->synchronize_from_tb = avr_cpu_synchronize_from_tb;

50
target/avr/helper.c
View File

@ -87,3 +87,53 @@ void avr_cpu_do_interrupt(CPUState *cs)
cs->exception_index = -1;
}
int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
int len, bool is_write)
{
return cpu_memory_rw_debug(cs, addr, buf, len, is_write);
}
hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
return addr; /* I assume 1:1 address correspondance */
}
bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
int prot = 0;
MemTxAttrs attrs = {};
uint32_t paddr;
address &= TARGET_PAGE_MASK;
if (mmu_idx == MMU_CODE_IDX) {
/* access to code in flash */
paddr = OFFSET_CODE + address;
prot = PAGE_READ | PAGE_EXEC;
if (paddr + TARGET_PAGE_SIZE > OFFSET_DATA) {
error_report("execution left flash memory");
abort();
}
} else if (address < NUMBER_OF_CPU_REGISTERS + NUMBER_OF_IO_REGISTERS) {
/*
* access to CPU registers, exit and rebuilt this TB to use full access
* incase it touches specially handled registers like SREG or SP
*/
AVRCPU *cpu = AVR_CPU(cs);
CPUAVRState *env = &cpu->env;
env->fullacc = 1;
cpu_loop_exit_restore(cs, retaddr);
} else {
/* access to memory. nothing special */
paddr = OFFSET_DATA + address;
prot = PAGE_READ | PAGE_WRITE;
}
tlb_set_page_with_attrs(cs, address, paddr, attrs, prot,
mmu_idx, TARGET_PAGE_SIZE);
return true;
}