hw/block/nvme: add symbolic command name to trace events
Add the symbolic command name to the pci_nvme_{io,admin}_cmd and pci_nvme_rw trace events. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
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@ -678,7 +678,8 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
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enum BlockAcctType acct = is_write ? BLOCK_ACCT_WRITE : BLOCK_ACCT_READ;
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uint16_t status;
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trace_pci_nvme_rw(is_write ? "write" : "read", nlb, data_size, slba);
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trace_pci_nvme_rw(nvme_cid(req), nvme_io_opc_str(rw->opcode), nlb,
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data_size, slba);
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status = nvme_check_mdts(n, data_size);
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if (status) {
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@ -727,7 +728,7 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
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uint32_t nsid = le32_to_cpu(req->cmd.nsid);
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trace_pci_nvme_io_cmd(nvme_cid(req), nsid, nvme_sqid(req),
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req->cmd.opcode);
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req->cmd.opcode, nvme_io_opc_str(req->cmd.opcode));
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if (unlikely(nsid == 0 || nsid > n->num_namespaces)) {
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trace_pci_nvme_err_invalid_ns(nsid, n->num_namespaces);
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@ -1579,7 +1580,8 @@ static uint16_t nvme_aer(NvmeCtrl *n, NvmeRequest *req)
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static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req)
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{
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trace_pci_nvme_admin_cmd(nvme_cid(req), nvme_sqid(req), req->cmd.opcode);
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trace_pci_nvme_admin_cmd(nvme_cid(req), nvme_sqid(req), req->cmd.opcode,
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nvme_adm_opc_str(req->cmd.opcode));
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switch (req->cmd.opcode) {
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case NVME_ADM_CMD_DELETE_SQ:
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@ -32,6 +32,34 @@ typedef struct NvmeRequest {
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QTAILQ_ENTRY(NvmeRequest)entry;
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} NvmeRequest;
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static inline const char *nvme_adm_opc_str(uint8_t opc)
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{
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switch (opc) {
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case NVME_ADM_CMD_DELETE_SQ: return "NVME_ADM_CMD_DELETE_SQ";
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case NVME_ADM_CMD_CREATE_SQ: return "NVME_ADM_CMD_CREATE_SQ";
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case NVME_ADM_CMD_GET_LOG_PAGE: return "NVME_ADM_CMD_GET_LOG_PAGE";
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case NVME_ADM_CMD_DELETE_CQ: return "NVME_ADM_CMD_DELETE_CQ";
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case NVME_ADM_CMD_CREATE_CQ: return "NVME_ADM_CMD_CREATE_CQ";
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case NVME_ADM_CMD_IDENTIFY: return "NVME_ADM_CMD_IDENTIFY";
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case NVME_ADM_CMD_ABORT: return "NVME_ADM_CMD_ABORT";
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case NVME_ADM_CMD_SET_FEATURES: return "NVME_ADM_CMD_SET_FEATURES";
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case NVME_ADM_CMD_GET_FEATURES: return "NVME_ADM_CMD_GET_FEATURES";
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case NVME_ADM_CMD_ASYNC_EV_REQ: return "NVME_ADM_CMD_ASYNC_EV_REQ";
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default: return "NVME_ADM_CMD_UNKNOWN";
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}
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}
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static inline const char *nvme_io_opc_str(uint8_t opc)
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{
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switch (opc) {
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case NVME_CMD_FLUSH: return "NVME_NVM_CMD_FLUSH";
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case NVME_CMD_WRITE: return "NVME_NVM_CMD_WRITE";
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case NVME_CMD_READ: return "NVME_NVM_CMD_READ";
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case NVME_CMD_WRITE_ZEROES: return "NVME_NVM_CMD_WRITE_ZEROES";
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default: return "NVME_NVM_CMD_UNKNOWN";
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}
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}
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typedef struct NvmeSQueue {
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struct NvmeCtrl *ctrl;
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uint16_t sqid;
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@ -36,9 +36,9 @@ pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) "DMA read, prp1=0x%"PRIx64" prp2
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pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64""
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pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64""
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pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" prp2 0x%"PRIx64" num_prps %d"
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pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"PRIx8""
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pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8""
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pci_nvme_rw(const char *verb, uint32_t blk_count, uint64_t byte_count, uint64_t lba) "%s %"PRIu32" blocks (%"PRIu64" bytes) from LBA %"PRIu64""
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pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_rw(uint16_t cid, const char *verb, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" '%s' nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_rw_cb(uint16_t cid) "cid %"PRIu16""
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pci_nvme_write_zeroes(uint16_t cid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" slba %"PRIu64" nlb %"PRIu32""
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pci_nvme_create_sq(uint64_t addr, uint16_t sqid, uint16_t cqid, uint16_t qsize, uint16_t qflags) "create submission queue, addr=0x%"PRIx64", sqid=%"PRIu16", cqid=%"PRIu16", qsize=%"PRIu16", qflags=%"PRIu16""
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