pci: introduce constant PCI_NUM_PINS for the number of interrupt pins, 4.
introduce constant PCI_NUM_PINS for the number of interrupt pins, 4. and use it. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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4
hw/pci.c
4
hw/pci.c
@ -229,7 +229,7 @@ const VMStateDescription vmstate_pci_device = {
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VMSTATE_INT32_LE(version_id, PCIDevice),
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VMSTATE_SINGLE(config, PCIDevice, 0, vmstate_info_pci_config,
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typeof_field(PCIDevice,config)),
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VMSTATE_INT32_ARRAY_V(irq_state, PCIDevice, 4, 2),
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VMSTATE_INT32_ARRAY_V(irq_state, PCIDevice, PCI_NUM_PINS, 2),
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VMSTATE_END_OF_LIST()
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}
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};
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@ -389,7 +389,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
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pci_dev->config_read = config_read;
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pci_dev->config_write = config_write;
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bus->devices[devfn] = pci_dev;
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pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, 4);
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pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS);
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pci_dev->version_id = 2; /* Current pci device vmstate version */
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return pci_dev;
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}
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4
hw/pci.h
4
hw/pci.h
@ -158,6 +158,8 @@ typedef struct PCIIORegion {
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/* Size of the standard PCI config space */
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#define PCI_CONFIG_SPACE_SIZE 0x100
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#define PCI_NUM_PINS 4 /* A-D */
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/* Bits in cap_present field. */
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enum {
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QEMU_PCI_CAP_MSIX = 0x1,
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@ -192,7 +194,7 @@ struct PCIDevice {
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qemu_irq *irq;
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/* Current IRQ levels. Used internally by the generic PCI code. */
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int irq_state[4];
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int irq_state[PCI_NUM_PINS];
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/* Capability bits */
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uint32_t cap_present;
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