s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *
In addition to 32/128bit variants, we also have to support the "Signal-on-QNaN (SQ)" bit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-16-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -252,12 +252,24 @@ DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfa128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfce32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfce32_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfce128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfce128_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfch32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfch32_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfch64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfch64_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfch128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfch128_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfche32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfche32_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfche128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfche128_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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@ -2621,26 +2621,65 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps *o)
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const uint8_t m5 = get_field(s, m5);
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const uint8_t m6 = get_field(s, m6);
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const bool cs = extract32(m6, 0, 1);
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gen_helper_gvec_3_ptr *fn;
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if (fpf != FPF_LONG || extract32(m5, 0, 3) || extract32(m6, 1, 3)) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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const bool sq = extract32(m5, 2, 1);
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gen_helper_gvec_3_ptr *fn = NULL;
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switch (s->fields.op2) {
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case 0xe8:
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switch (fpf) {
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case FPF_SHORT:
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fn = cs ? gen_helper_gvec_vfce32_cc : gen_helper_gvec_vfce32;
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break;
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case FPF_LONG:
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fn = cs ? gen_helper_gvec_vfce64_cc : gen_helper_gvec_vfce64;
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break;
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case FPF_EXT:
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fn = cs ? gen_helper_gvec_vfce128_cc : gen_helper_gvec_vfce128;
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break;
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default:
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break;
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}
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break;
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case 0xeb:
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switch (fpf) {
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case FPF_SHORT:
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fn = cs ? gen_helper_gvec_vfch32_cc : gen_helper_gvec_vfch32;
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break;
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case FPF_LONG:
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fn = cs ? gen_helper_gvec_vfch64_cc : gen_helper_gvec_vfch64;
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break;
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case FPF_EXT:
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fn = cs ? gen_helper_gvec_vfch128_cc : gen_helper_gvec_vfch128;
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break;
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default:
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break;
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}
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break;
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case 0xea:
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switch (fpf) {
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case FPF_SHORT:
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fn = cs ? gen_helper_gvec_vfche32_cc : gen_helper_gvec_vfche32;
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break;
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case FPF_LONG:
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fn = cs ? gen_helper_gvec_vfche64_cc : gen_helper_gvec_vfche64;
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break;
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case FPF_EXT:
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fn = cs ? gen_helper_gvec_vfche128_cc : gen_helper_gvec_vfche128;
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break;
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default:
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break;
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}
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break;
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default:
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g_assert_not_reached();
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}
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if (!fn || extract32(m5, 0, 2) || extract32(m6, 1, 3) ||
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(!s390_has_feat(S390_FEAT_VECTOR_ENH) && (fpf != FPF_LONG || sq))) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3),
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cpu_env, m5, fn);
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if (cs) {
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@ -340,6 +340,38 @@ void HELPER(gvec_##NAME##BITS)(const void *v1, const void *v2, \
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DEF_GVEC_WFC(wfc, false)
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DEF_GVEC_WFC(wfk, true)
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typedef bool (*vfc32_fn)(float32 a, float32 b, float_status *status);
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static int vfc32(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vfc32_fn fn, uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int match = 0;
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int i;
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for (i = 0; i < 4; i++) {
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const float32 a = s390_vec_read_float32(v2, i);
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const float32 b = s390_vec_read_float32(v3, i);
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/* swap the order of the parameters, so we can use existing functions */
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if (fn(b, a, &env->fpu_status)) {
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match++;
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s390_vec_write_element32(&tmp, i, -1u);
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}
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vxc = check_ieee_exc(env, i, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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if (match) {
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return s || match == 4 ? 0 : 1;
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}
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return 3;
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}
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typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
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static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
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@ -372,12 +404,35 @@ static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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return 3;
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}
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typedef bool (*vfc128_fn)(float128 a, float128 b, float_status *status);
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static int vfc128(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vfc128_fn fn, uintptr_t retaddr)
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{
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const float128 a = s390_vec_read_float128(v2);
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const float128 b = s390_vec_read_float128(v3);
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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bool match = false;
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/* swap the order of the parameters, so we can use existing functions */
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if (fn(b, a, &env->fpu_status)) {
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match = true;
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s390_vec_write_element64(&tmp, 0, -1ull);
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s390_vec_write_element64(&tmp, 1, -1ull);
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}
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vxc = check_ieee_exc(env, 0, false, &vec_exc);
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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return match ? 0 : 3;
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}
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#define DEF_GVEC_VFC_B(NAME, OP, BITS) \
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void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
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const bool sq = extract32(simd_data(desc), 2, 1); \
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vfc##BITS##_fn fn = sq ? float##BITS##_##OP : float##BITS##_##OP##_quiet; \
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\
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vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
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} \
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@ -386,13 +441,16 @@ void HELPER(gvec_##NAME##BITS##_cc)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
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const bool sq = extract32(simd_data(desc), 2, 1); \
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vfc##BITS##_fn fn = sq ? float##BITS##_##OP : float##BITS##_##OP##_quiet; \
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\
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env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
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}
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#define DEF_GVEC_VFC(NAME, OP) \
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DEF_GVEC_VFC_B(NAME, OP, 64)
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DEF_GVEC_VFC_B(NAME, OP, 32) \
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DEF_GVEC_VFC_B(NAME, OP, 64) \
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DEF_GVEC_VFC_B(NAME, OP, 128) \
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DEF_GVEC_VFC(vfce, eq)
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DEF_GVEC_VFC(vfch, lt)
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