tcg/ppc: Introduce HostAddress
Collect the parts of the host address into a struct. Reorg tcg_out_qemu_{ld,st} to use it. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -2287,67 +2287,71 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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{
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return tcg_out_fail_alignment(s, l);
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}
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#endif /* SOFTMMU */
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typedef struct {
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TCGReg base;
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TCGReg index;
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} HostAddress;
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static void tcg_out_qemu_ld(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg addrlo, TCGReg addrhi,
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MemOpIdx oi, TCGType data_type)
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{
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MemOp opc = get_memop(oi);
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MemOp s_bits = opc & MO_SIZE;
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TCGReg rbase;
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HostAddress h;
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#ifdef CONFIG_SOFTMMU
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tcg_insn_unit *label_ptr;
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addrlo = tcg_out_tlb_read(s, opc, addrlo, addrhi, get_mmuidx(oi), true);
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h.index = tcg_out_tlb_read(s, opc, addrlo, addrhi, get_mmuidx(oi), true);
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h.base = TCG_REG_R3;
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/* Load a pointer into the current opcode w/conditional branch-link. */
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label_ptr = s->code_ptr;
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tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
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rbase = TCG_REG_R3;
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#else /* !CONFIG_SOFTMMU */
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unsigned a_bits = get_alignment_bits(opc);
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if (a_bits) {
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tcg_out_test_alignment(s, true, addrlo, addrhi, a_bits);
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}
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rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
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h.base = guest_base ? TCG_GUEST_BASE_REG : 0;
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h.index = addrlo;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
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addrlo = TCG_REG_TMP1;
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h.index = TCG_REG_TMP1;
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}
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#endif
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if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
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if (opc & MO_BSWAP) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));
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tcg_out32(s, LWBRX | TAB(datalo, rbase, addrlo));
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tcg_out32(s, LWBRX | TAB(datahi, rbase, TCG_REG_R0));
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} else if (rbase != 0) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));
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tcg_out32(s, LWZX | TAB(datahi, rbase, addrlo));
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tcg_out32(s, LWZX | TAB(datalo, rbase, TCG_REG_R0));
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} else if (addrlo == datahi) {
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tcg_out32(s, LWZ | TAI(datalo, addrlo, 4));
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tcg_out32(s, LWZ | TAI(datahi, addrlo, 0));
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, h.index, 4));
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tcg_out32(s, LWBRX | TAB(datalo, h.base, h.index));
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tcg_out32(s, LWBRX | TAB(datahi, h.base, TCG_REG_R0));
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} else if (h.base != 0) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, h.index, 4));
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tcg_out32(s, LWZX | TAB(datahi, h.base, h.index));
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tcg_out32(s, LWZX | TAB(datalo, h.base, TCG_REG_R0));
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} else if (h.index == datahi) {
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tcg_out32(s, LWZ | TAI(datalo, h.index, 4));
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tcg_out32(s, LWZ | TAI(datahi, h.index, 0));
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} else {
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tcg_out32(s, LWZ | TAI(datahi, addrlo, 0));
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tcg_out32(s, LWZ | TAI(datalo, addrlo, 4));
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tcg_out32(s, LWZ | TAI(datahi, h.index, 0));
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tcg_out32(s, LWZ | TAI(datalo, h.index, 4));
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}
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} else {
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uint32_t insn = qemu_ldx_opc[opc & (MO_BSWAP | MO_SSIZE)];
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if (!have_isa_2_06 && insn == LDBRX) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));
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tcg_out32(s, LWBRX | TAB(datalo, rbase, addrlo));
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tcg_out32(s, LWBRX | TAB(TCG_REG_R0, rbase, TCG_REG_R0));
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, h.index, 4));
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tcg_out32(s, LWBRX | TAB(datalo, h.base, h.index));
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tcg_out32(s, LWBRX | TAB(TCG_REG_R0, h.base, TCG_REG_R0));
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tcg_out_rld(s, RLDIMI, datalo, TCG_REG_R0, 32, 0);
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} else if (insn) {
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tcg_out32(s, insn | TAB(datalo, rbase, addrlo));
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tcg_out32(s, insn | TAB(datalo, h.base, h.index));
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} else {
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insn = qemu_ldx_opc[opc & (MO_SIZE | MO_BSWAP)];
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tcg_out32(s, insn | TAB(datalo, rbase, addrlo));
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tcg_out32(s, insn | TAB(datalo, h.base, h.index));
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tcg_out_movext(s, TCG_TYPE_REG, datalo,
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TCG_TYPE_REG, opc & MO_SSIZE, datalo);
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}
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@ -2365,52 +2369,52 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg datalo, TCGReg datahi,
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{
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MemOp opc = get_memop(oi);
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MemOp s_bits = opc & MO_SIZE;
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TCGReg rbase;
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HostAddress h;
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#ifdef CONFIG_SOFTMMU
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tcg_insn_unit *label_ptr;
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addrlo = tcg_out_tlb_read(s, opc, addrlo, addrhi, get_mmuidx(oi), false);
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h.index = tcg_out_tlb_read(s, opc, addrlo, addrhi, get_mmuidx(oi), false);
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h.base = TCG_REG_R3;
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/* Load a pointer into the current opcode w/conditional branch-link. */
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label_ptr = s->code_ptr;
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tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
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rbase = TCG_REG_R3;
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#else /* !CONFIG_SOFTMMU */
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unsigned a_bits = get_alignment_bits(opc);
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if (a_bits) {
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tcg_out_test_alignment(s, false, addrlo, addrhi, a_bits);
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}
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rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
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h.base = guest_base ? TCG_GUEST_BASE_REG : 0;
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h.index = addrlo;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
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addrlo = TCG_REG_TMP1;
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h.index = TCG_REG_TMP1;
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}
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#endif
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if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
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if (opc & MO_BSWAP) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));
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tcg_out32(s, STWBRX | SAB(datalo, rbase, addrlo));
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tcg_out32(s, STWBRX | SAB(datahi, rbase, TCG_REG_R0));
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} else if (rbase != 0) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));
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tcg_out32(s, STWX | SAB(datahi, rbase, addrlo));
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tcg_out32(s, STWX | SAB(datalo, rbase, TCG_REG_R0));
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, h.index, 4));
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tcg_out32(s, STWBRX | SAB(datalo, h.base, h.index));
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tcg_out32(s, STWBRX | SAB(datahi, h.base, TCG_REG_R0));
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} else if (h.base != 0) {
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tcg_out32(s, ADDI | TAI(TCG_REG_R0, h.index, 4));
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tcg_out32(s, STWX | SAB(datahi, h.base, h.index));
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tcg_out32(s, STWX | SAB(datalo, h.base, TCG_REG_R0));
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} else {
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tcg_out32(s, STW | TAI(datahi, addrlo, 0));
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tcg_out32(s, STW | TAI(datalo, addrlo, 4));
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tcg_out32(s, STW | TAI(datahi, h.index, 0));
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tcg_out32(s, STW | TAI(datalo, h.index, 4));
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}
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} else {
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uint32_t insn = qemu_stx_opc[opc & (MO_BSWAP | MO_SIZE)];
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if (!have_isa_2_06 && insn == STDBRX) {
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tcg_out32(s, STWBRX | SAB(datalo, rbase, addrlo));
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tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, addrlo, 4));
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tcg_out32(s, STWBRX | SAB(datalo, h.base, h.index));
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tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, h.index, 4));
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tcg_out_shri64(s, TCG_REG_R0, datalo, 32);
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tcg_out32(s, STWBRX | SAB(TCG_REG_R0, rbase, TCG_REG_TMP1));
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tcg_out32(s, STWBRX | SAB(TCG_REG_R0, h.base, TCG_REG_TMP1));
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} else {
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tcg_out32(s, insn | SAB(datalo, rbase, addrlo));
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tcg_out32(s, insn | SAB(datalo, h.base, h.index));
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}
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}
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