esp: rework write_response() to avoid using the FIFO for DMA transactions
The code for write_response() has always used the FIFO to store the data for the status/message in phases, even for DMA transactions. Switch to using a separate buffer that can be used directly for DMA transactions and restrict the FIFO use to the non-DMA case. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210407195801.685-3-mark.cave-ayland@ilande.co.uk>
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@ -445,18 +445,16 @@ static void write_response_pdma_cb(ESPState *s)
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static void write_response(ESPState *s)
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static void write_response(ESPState *s)
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{
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{
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uint32_t n;
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uint8_t buf[2];
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trace_esp_write_response(s->status);
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trace_esp_write_response(s->status);
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fifo8_reset(&s->fifo);
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buf[0] = s->status;
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esp_fifo_push(s, s->status);
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buf[1] = 0;
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esp_fifo_push(s, 0);
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if (s->dma) {
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if (s->dma) {
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if (s->dma_memory_write) {
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if (s->dma_memory_write) {
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s->dma_memory_write(s->dma_opaque,
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s->dma_memory_write(s->dma_opaque, buf, 2);
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(uint8_t *)fifo8_pop_buf(&s->fifo, 2, &n), 2);
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s->rregs[ESP_RSTAT] = STAT_TC | STAT_ST;
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s->rregs[ESP_RSTAT] = STAT_TC | STAT_ST;
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s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
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s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
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s->rregs[ESP_RSEQ] = SEQ_CD;
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s->rregs[ESP_RSEQ] = SEQ_CD;
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@ -466,7 +464,8 @@ static void write_response(ESPState *s)
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return;
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return;
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}
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}
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} else {
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} else {
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s->ti_size = 2;
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fifo8_reset(&s->fifo);
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fifo8_push_all(&s->fifo, buf, 2);
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s->rregs[ESP_RFLAGS] = 2;
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s->rregs[ESP_RFLAGS] = 2;
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}
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}
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esp_raise_irq(s);
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esp_raise_irq(s);
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