target/alpha: Convert to CPUClass::tlb_fill
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -225,9 +225,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
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cc->set_pc = alpha_cpu_set_pc;
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cc->set_pc = alpha_cpu_set_pc;
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cc->gdb_read_register = alpha_cpu_gdb_read_register;
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cc->gdb_read_register = alpha_cpu_gdb_read_register;
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cc->gdb_write_register = alpha_cpu_gdb_write_register;
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cc->gdb_write_register = alpha_cpu_gdb_write_register;
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#ifdef CONFIG_USER_ONLY
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cc->tlb_fill = alpha_cpu_tlb_fill;
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cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
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#ifndef CONFIG_USER_ONLY
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#else
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cc->do_transaction_failed = alpha_cpu_do_transaction_failed;
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cc->do_transaction_failed = alpha_cpu_do_transaction_failed;
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cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
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cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
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cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
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cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
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@ -475,8 +475,9 @@ void alpha_cpu_list(void);
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is returned if the signal was handled by the virtual CPU. */
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is returned if the signal was handled by the virtual CPU. */
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int cpu_alpha_signal_handler(int host_signum, void *pinfo,
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int cpu_alpha_signal_handler(int host_signum, void *pinfo,
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void *puc);
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void *puc);
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int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw,
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bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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int mmu_idx);
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
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void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
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void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
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void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
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@ -104,14 +104,15 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val)
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}
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}
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#if defined(CONFIG_USER_ONLY)
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#if defined(CONFIG_USER_ONLY)
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int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
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bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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int rw, int mmu_idx)
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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{
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AlphaCPU *cpu = ALPHA_CPU(cs);
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AlphaCPU *cpu = ALPHA_CPU(cs);
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cs->exception_index = EXCP_MMFAULT;
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cs->exception_index = EXCP_MMFAULT;
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cpu->env.trap_arg0 = address;
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cpu->env.trap_arg0 = address;
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return 1;
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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#else
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#else
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/* Returns the OSF/1 entMM failure indication, or -1 on success. */
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/* Returns the OSF/1 entMM failure indication, or -1 on success. */
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@ -248,26 +249,37 @@ hwaddr alpha_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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return (fail >= 0 ? -1 : phys);
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return (fail >= 0 ? -1 : phys);
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}
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}
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int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size, int rw,
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bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
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int mmu_idx)
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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{
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AlphaCPU *cpu = ALPHA_CPU(cs);
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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CPUAlphaState *env = &cpu->env;
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target_ulong phys;
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target_ulong phys;
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int prot, fail;
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int prot, fail;
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fail = get_physical_address(env, addr, 1 << rw, mmu_idx, &phys, &prot);
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fail = get_physical_address(env, addr, 1 << access_type,
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mmu_idx, &phys, &prot);
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if (unlikely(fail >= 0)) {
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if (unlikely(fail >= 0)) {
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if (probe) {
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return false;
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}
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cs->exception_index = EXCP_MMFAULT;
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cs->exception_index = EXCP_MMFAULT;
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env->trap_arg0 = addr;
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env->trap_arg0 = addr;
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env->trap_arg1 = fail;
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env->trap_arg1 = fail;
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env->trap_arg2 = (rw == 2 ? -1 : rw);
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env->trap_arg2 = (access_type == MMU_INST_FETCH ? -1 : access_type);
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return 1;
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
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tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
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prot, mmu_idx, TARGET_PAGE_SIZE);
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prot, mmu_idx, TARGET_PAGE_SIZE);
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return 0;
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return true;
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}
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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{
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alpha_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
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}
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}
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#endif /* USER_ONLY */
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#endif /* USER_ONLY */
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@ -62,20 +62,4 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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env->error_code = 0;
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env->error_code = 0;
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cpu_loop_exit_restore(cs, retaddr);
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = alpha_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
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if (unlikely(ret != 0)) {
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/* Exception index and error code are already set */
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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#endif /* CONFIG_USER_ONLY */
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#endif /* CONFIG_USER_ONLY */
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