ppc/pnv: add PnvPHB base/proxy device
The PnvPHB device is going to be the base device for all other powernv PHBs. It consists of a device that has the same user API as the other PHB, namely being a PCIHostBridge and having chip-id and index properties. It also has a 'backend' pointer that will be initialized with the PHB implementation that the device is going to use. The initialization of the PHB backend is done by checking the PHB version via a 'version' attribute that can be set via a global machine property. The 'version' field will be used to make adjustments based on the running version, e.g. PHB3 uses a 'chip' reference while PHB4 uses 'pec'. To init the PnvPHB bus we'll rely on helpers for each version. The version 3 helper is already added (pnv_phb3_bus_init), the PHB4 helper will be added later on. For now let's add the basic logic of the PnvPHB object, which consists mostly of pnv_phb_realize() doing all the work of checking the phb->version set, initializing the proper backend, passing through its attributes to the chosen backend, finalizing the backend realize and adding a root port in the end. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220624084921.399219-3-danielhb413@gmail.com>
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@ -35,5 +35,6 @@ specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files(
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'pnv_phb3_msi.c',
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'pnv_phb3_pbcq.c',
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'pnv_phb4.c',
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'pnv_phb4_pec.c'
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'pnv_phb4_pec.c',
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'pnv_phb.c',
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))
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124
hw/pci-host/pnv_phb.c
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124
hw/pci-host/pnv_phb.c
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@ -0,0 +1,124 @@
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/*
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* QEMU PowerPC PowerNV Proxy PHB model
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*
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* Copyright (c) 2022, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qapi/visitor.h"
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#include "qapi/error.h"
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#include "hw/pci-host/pnv_phb.h"
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#include "hw/pci-host/pnv_phb3.h"
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#include "hw/pci-host/pnv_phb4.h"
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#include "hw/ppc/pnv.h"
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#include "hw/qdev-properties.h"
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#include "qom/object.h"
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static void pnv_phb_realize(DeviceState *dev, Error **errp)
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{
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PnvPHB *phb = PNV_PHB(dev);
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PCIHostState *pci = PCI_HOST_BRIDGE(dev);
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g_autofree char *phb_typename = NULL;
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g_autofree char *phb_rootport_typename = NULL;
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if (!phb->version) {
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error_setg(errp, "version not specified");
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return;
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}
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switch (phb->version) {
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case 3:
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phb_typename = g_strdup(TYPE_PNV_PHB3);
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phb_rootport_typename = g_strdup(TYPE_PNV_PHB3_ROOT_PORT);
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break;
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case 4:
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phb_typename = g_strdup(TYPE_PNV_PHB4);
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phb_rootport_typename = g_strdup(TYPE_PNV_PHB4_ROOT_PORT);
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break;
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case 5:
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phb_typename = g_strdup(TYPE_PNV_PHB5);
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phb_rootport_typename = g_strdup(TYPE_PNV_PHB5_ROOT_PORT);
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break;
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default:
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g_assert_not_reached();
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}
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phb->backend = object_new(phb_typename);
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object_property_add_child(OBJECT(dev), "phb-backend", phb->backend);
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/* Passthrough child device properties to the proxy device */
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object_property_set_uint(phb->backend, "index", phb->phb_id, errp);
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object_property_set_uint(phb->backend, "chip-id", phb->chip_id, errp);
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object_property_set_link(phb->backend, "phb-base", OBJECT(phb), errp);
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if (phb->version == 3) {
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object_property_set_link(phb->backend, "chip",
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OBJECT(phb->chip), errp);
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} else {
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object_property_set_link(phb->backend, "pec", OBJECT(phb->pec), errp);
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}
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if (!qdev_realize(DEVICE(phb->backend), NULL, errp)) {
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return;
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}
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if (phb->version == 3) {
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pnv_phb3_bus_init(dev, PNV_PHB3(phb->backend));
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}
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pnv_phb_attach_root_port(pci, phb_rootport_typename,
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phb->phb_id, phb->chip_id);
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}
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static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge,
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PCIBus *rootbus)
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{
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PnvPHB *phb = PNV_PHB(host_bridge);
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snprintf(phb->bus_path, sizeof(phb->bus_path), "00%02x:%02x",
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phb->chip_id, phb->phb_id);
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return phb->bus_path;
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}
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static Property pnv_phb_properties[] = {
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DEFINE_PROP_UINT32("index", PnvPHB, phb_id, 0),
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DEFINE_PROP_UINT32("chip-id", PnvPHB, chip_id, 0),
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DEFINE_PROP_UINT32("version", PnvPHB, version, 0),
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DEFINE_PROP_LINK("chip", PnvPHB, chip, TYPE_PNV_CHIP, PnvChip *),
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DEFINE_PROP_LINK("pec", PnvPHB, pec, TYPE_PNV_PHB4_PEC,
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PnvPhb4PecState *),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pnv_phb_class_init(ObjectClass *klass, void *data)
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{
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PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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hc->root_bus_path = pnv_phb_root_bus_path;
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dc->realize = pnv_phb_realize;
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device_class_set_props(dc, pnv_phb_properties);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->user_creatable = false;
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}
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static void pnv_phb_register_type(void)
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{
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static const TypeInfo pnv_phb_type_info = {
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.name = TYPE_PNV_PHB,
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.parent = TYPE_PCIE_HOST_BRIDGE,
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.instance_size = sizeof(PnvPHB),
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.class_init = pnv_phb_class_init,
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};
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type_register_static(&pnv_phb_type_info);
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}
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type_init(pnv_phb_register_type)
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39
hw/pci-host/pnv_phb.h
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39
hw/pci-host/pnv_phb.h
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/*
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* QEMU PowerPC PowerNV Proxy PHB model
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*
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* Copyright (c) 2022, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef PCI_HOST_PNV_PHB_H
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#define PCI_HOST_PNV_PHB_H
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#include "hw/pci/pcie_host.h"
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#include "hw/pci/pcie_port.h"
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#include "qom/object.h"
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typedef struct PnvChip PnvChip;
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typedef struct PnvPhb4PecState PnvPhb4PecState;
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struct PnvPHB {
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PCIExpressHost parent_obj;
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uint32_t chip_id;
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uint32_t phb_id;
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uint32_t version;
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char bus_path[8];
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PnvChip *chip;
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PnvPhb4PecState *pec;
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/* The PHB backend (PnvPHB3, PnvPHB4 ...) being used */
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Object *backend;
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};
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#define TYPE_PNV_PHB "pnv-phb"
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OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB, PNV_PHB)
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#endif /* PCI_HOST_PNV_PHB_H */
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