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more generic serial port (initial patch by Jocelyn Mayer)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1654 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2005-11-23 21:11:49 +00:00
parent 2023a2c836
commit e5d13e2f64
7 changed files with 112 additions and 11 deletions
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2
hw/mips_r4k.c
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@ -251,7 +251,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
isa_pic = pic_init(pic_irq_request, env);
pit = pit_init(0x40, 0);
serial_init(0x3f8, 4, serial_hds[0]);
serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
vga_ram_size, 0, 0);

5
hw/pc.c
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@ -599,7 +599,7 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
/* XXX: enable it in all cases */
env->cpuid_features |= CPUID_APIC;
}
register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
qemu_register_reset(main_cpu_reset, env);
if (pci_enabled) {
apic_init(env);
@ -757,7 +757,8 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
serial_init(serial_io[i], serial_irq[i], serial_hds[i]);
serial_init(&pic_set_irq_new, isa_pic,
serial_io[i], serial_irq[i], serial_hds[i]);
}
}

4
hw/ppc_chrp.c
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@ -433,7 +433,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
isa_pic = pic_init(pic_irq_request, NULL);
/* XXX: use Mac Serial port */
serial_init(0x3f8, 4, serial_hds[0]);
serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
for(i = 0; i < nb_nics; i++) {
pci_ne2000_init(pci_bus, &nd_table[i]);
@ -482,7 +482,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
isa_pic = pic_init(pic_irq_request, NULL);
/* XXX: use Mac Serial port */
serial_init(0x3f8, 4, serial_hds[0]);
serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
for(i = 0; i < nb_nics; i++) {
pci_ne2000_init(pci_bus, &nd_table[i]);

3
hw/ppc_prep.c
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@ -525,6 +525,7 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
{
CPUState *env;
char buf[1024];
SetIRQFunc *set_irq;
m48t59_t *nvram;
int PPC_io_memory;
int linux_boot, i, nb_nics1, bios_size;
@ -618,7 +619,7 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
isa_pic = pic_init(pic_irq_request, first_cpu);
// pit = pit_init(0x40, 0);
serial_init(0x3f8, 4, serial_hds[0]);
serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
nb_nics1 = nb_nics;
if (nb_nics1 > NE2000_NB_MAX)
nb_nics1 = NE2000_NB_MAX;

100
hw/serial.c
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@ -83,9 +83,13 @@ struct SerialState {
/* NOTE: this hidden state is necessary for tx irq generation as
it can be reset while reading iir */
int thr_ipending;
SetIRQFunc *set_irq;
void *irq_opaque;
int irq;
CharDriverState *chr;
int last_break_enable;
target_ulong base;
int it_shift;
};
static void serial_update_irq(SerialState *s)
@ -98,9 +102,9 @@ static void serial_update_irq(SerialState *s)
s->iir = UART_IIR_NO_INT;
}
if (s->iir != UART_IIR_NO_INT) {
pic_set_irq(s->irq, 1);
s->set_irq(s->irq_opaque, s->irq, 1);
} else {
pic_set_irq(s->irq, 0);
s->set_irq(s->irq_opaque, s->irq, 0);
}
}
@ -339,13 +343,16 @@ static int serial_load(QEMUFile *f, void *opaque, int version_id)
}
/* If fd is zero, it means that the serial device uses the console */
SerialState *serial_init(int base, int irq, CharDriverState *chr)
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
int base, int irq, CharDriverState *chr)
{
SerialState *s;
s = qemu_mallocz(sizeof(SerialState));
if (!s)
return NULL;
s->set_irq = set_irq;
s->irq_opaque = opaque;
s->irq = irq;
s->lsr = UART_LSR_TEMT | UART_LSR_THRE;
s->iir = UART_IIR_NO_INT;
@ -359,3 +366,90 @@ SerialState *serial_init(int base, int irq, CharDriverState *chr)
qemu_chr_add_event_handler(chr, serial_event);
return s;
}
/* Memory mapped interface */
static uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr)
{
SerialState *s = opaque;
return serial_ioport_read(s, (addr - s->base) >> s->it_shift) & 0xFF;
}
static void serial_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
SerialState *s = opaque;
serial_ioport_write(s, (addr - s->base) >> s->it_shift, value & 0xFF);
}
static uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr)
{
SerialState *s = opaque;
return serial_ioport_read(s, (addr - s->base) >> s->it_shift) & 0xFFFF;
}
static void serial_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
SerialState *s = opaque;
serial_ioport_write(s, (addr - s->base) >> s->it_shift, value & 0xFFFF);
}
static uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr)
{
SerialState *s = opaque;
return serial_ioport_read(s, (addr - s->base) >> s->it_shift);
}
static void serial_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
SerialState *s = opaque;
serial_ioport_write(s, (addr - s->base) >> s->it_shift, value);
}
static CPUReadMemoryFunc *serial_mm_read[] = {
&serial_mm_readb,
&serial_mm_readw,
&serial_mm_readl,
};
static CPUWriteMemoryFunc *serial_mm_write[] = {
&serial_mm_writeb,
&serial_mm_writew,
&serial_mm_writel,
};
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
target_ulong base, int it_shift,
int irq, CharDriverState *chr)
{
SerialState *s;
int s_io_memory;
s = qemu_mallocz(sizeof(SerialState));
if (!s)
return NULL;
s->set_irq = set_irq;
s->irq_opaque = opaque;
s->irq = irq;
s->lsr = UART_LSR_TEMT | UART_LSR_THRE;
s->iir = UART_IIR_NO_INT;
s->base = base;
s->it_shift = it_shift;
register_savevm("serial", base, 1, serial_save, serial_load, s);
s_io_memory = cpu_register_io_memory(0, serial_mm_read,
serial_mm_write, s);
cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
s->chr = chr;
qemu_chr_add_read_handler(chr, serial_can_receive1, serial_receive1, s);
qemu_chr_add_event_handler(chr, serial_event);
return s;
}

3
hw/sun4u.c
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@ -335,7 +335,8 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device,
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
serial_init(serial_io[i], serial_irq[i], serial_hds[i]);
serial_init(&pic_set_irq_new, NULL,
serial_io[i], serial_irq[i], serial_hds[i]);
}
}

6
vl.h
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@ -733,7 +733,11 @@ void rtc_set_date(RTCState *s, const struct tm *tm);
/* serial.c */
typedef struct SerialState SerialState;
SerialState *serial_init(int base, int irq, CharDriverState *chr);
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
int base, int irq, CharDriverState *chr);
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
target_ulong base, int it_shift,
int irq, CharDriverState *chr);
/* parallel.c */