target/arm: Add infrastructure for disas_sme
This includes the build rules for the decoder, and the new file for translation, but excludes any instructions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1,5 +1,6 @@
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gen = [
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decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
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decodetree.process('sme.decode', extra_args: '--decode=disas_sme'),
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decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'),
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decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
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decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
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@ -50,6 +51,7 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
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'sme_helper.c',
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'translate-a64.c',
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'translate-sve.c',
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'translate-sme.c',
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))
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arm_softmmu_ss = ss.source_set()
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@ -0,0 +1,20 @@
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# AArch64 SME instruction descriptions
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#
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# Copyright (c) 2022 Linaro, Ltd
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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# This file is processed by scripts/decodetree.py
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#
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@ -14806,7 +14806,12 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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}
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switch (extract32(insn, 25, 4)) {
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case 0x0: case 0x1: case 0x3: /* UNALLOCATED */
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case 0x0:
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if (!extract32(insn, 31, 1) || !disas_sme(s, insn)) {
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unallocated_encoding(s);
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}
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break;
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case 0x1: case 0x3: /* UNALLOCATED */
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unallocated_encoding(s);
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break;
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case 0x2:
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@ -146,6 +146,7 @@ static inline int pred_gvec_reg_size(DisasContext *s)
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}
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bool disas_sve(DisasContext *, uint32_t);
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bool disas_sme(DisasContext *, uint32_t);
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void gen_gvec_rax1(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
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uint32_t rm_ofs, uint32_t opr_sz, uint32_t max_sz);
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@ -0,0 +1,35 @@
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/*
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* AArch64 SME translation
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*
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* Copyright (c) 2022 Linaro, Ltd
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "tcg/tcg-op.h"
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#include "tcg/tcg-op-gvec.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "translate.h"
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#include "exec/helper-gen.h"
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#include "translate-a64.h"
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#include "fpu/softfloat.h"
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/*
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* Include the generated decoder.
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*/
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#include "decode-sme.c.inc"
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