Fix mov[tf].ps handling for MIPS, by Richard Sandiford.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4563 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1632,10 +1632,11 @@ FLOAT_OP(movf, s)
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}
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FLOAT_OP(movf, ps)
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{
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if (!(env->fpu->fcr31 & PARAM1)) {
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unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;
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if (!(mask & 1))
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WT2 = WT0;
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if (!(mask & 2))
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WTH2 = WTH0;
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}
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DEBUG_FPU_STATE();
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FORCE_RET();
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}
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@ -1655,10 +1656,11 @@ FLOAT_OP(movt, s)
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}
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FLOAT_OP(movt, ps)
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{
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if (env->fpu->fcr31 & PARAM1) {
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unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;
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if (mask & 1)
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WT2 = WT0;
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if (mask & 2)
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WTH2 = WTH0;
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}
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DEBUG_FPU_STATE();
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FORCE_RET();
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}
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@ -5594,7 +5594,6 @@ static void glue(gen_movcf_, fmt) (DisasContext *ctx, int cc, int tf) \
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}
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GEN_MOVCF(d);
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GEN_MOVCF(s);
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GEN_MOVCF(ps);
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#undef GEN_MOVCF
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static void gen_farith (DisasContext *ctx, uint32_t op1,
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@ -6213,7 +6212,10 @@ static void gen_farith (DisasContext *ctx, uint32_t op1,
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GEN_LOAD_FREG_FTN(WTH0, fs);
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GEN_LOAD_FREG_FTN(WT2, fd);
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GEN_LOAD_FREG_FTN(WTH2, fd);
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gen_movcf_ps(ctx, (ft >> 2) & 0x7, ft & 0x1);
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if (ft & 0x1)
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gen_op_float_movt_ps ((ft >> 2) & 0x7);
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else
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gen_op_float_movf_ps ((ft >> 2) & 0x7);
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GEN_STORE_FTN_FREG(fd, WT2);
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GEN_STORE_FTN_FREG(fd, WTH2);
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opn = "movcf.ps";
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