PPC: e500: split mpc8544ds machine from generic e500 code

Currently the only mpc8544ds-ism that is factored out is
toplevel compatible and model.  In the future the generic e500
code is expected to become more generic.

Signed-off-by: Scott Wood <scottwood@freescale.com>
[agraf: conditionalize on CONFIG_FDT]
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Scott Wood 2012-07-02 13:03:20 +00:00 committed by Alexander Graf
parent b330598137
commit e6eaabeb8d
4 changed files with 114 additions and 51 deletions

View File

@ -27,4 +27,4 @@ obj-y += xilinx_ethlite.o
obj-y := $(addprefix ../,$(obj-y))
obj-$(CONFIG_FDT) += e500.o
obj-$(CONFIG_FDT) += e500.o mpc8544ds.o

View File

@ -16,6 +16,7 @@
#include "config.h"
#include "qemu-common.h"
#include "e500.h"
#include "net.h"
#include "hw/hw.h"
#include "hw/pc.h"
@ -106,24 +107,21 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
}
static int ppce500_load_device_tree(CPUPPCState *env,
PPCE500Params *params,
target_phys_addr_t addr,
target_phys_addr_t ramsize,
target_phys_addr_t initrd_base,
target_phys_addr_t initrd_size,
const char *kernel_cmdline)
target_phys_addr_t initrd_size)
{
int ret = -1;
uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
uint64_t mem_reg_property[] = { 0, cpu_to_be64(params->ram_size) };
int fdt_size;
void *fdt;
uint8_t hypercall[16];
uint32_t clock_freq = 400000000;
uint32_t tb_freq = 400000000;
int i;
const char *compatible = "MPC8544DS\0MPC85xxDS";
int compatible_len = sizeof("MPC8544DS\0MPC85xxDS");
const char *toplevel_compat = NULL; /* user override */
char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
char model[] = "MPC8544DS";
char soc[128];
char mpic[128];
uint32_t mpic_ph;
@ -146,14 +144,9 @@ static int ppce500_load_device_tree(CPUPPCState *env,
machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
if (machine_opts) {
const char *tmp;
dumpdtb = qemu_opt_get(machine_opts, "dumpdtb");
dtb_file = qemu_opt_get(machine_opts, "dtb");
tmp = qemu_opt_get(machine_opts, "dt_compatible");
if (tmp) {
compatible = tmp;
compatible_len = strlen(compatible) + 1;
}
toplevel_compat = qemu_opt_get(machine_opts, "dt_compatible");
}
if (dtb_file) {
@ -176,8 +169,6 @@ static int ppce500_load_device_tree(CPUPPCState *env,
}
/* Manipulate device tree in memory. */
qemu_devtree_setprop_string(fdt, "/", "model", model);
qemu_devtree_setprop(fdt, "/", "compatible", compatible, compatible_len);
qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2);
qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2);
@ -202,7 +193,7 @@ static int ppce500_load_device_tree(CPUPPCState *env,
}
ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
kernel_cmdline);
params->kernel_cmdline);
if (ret < 0)
fprintf(stderr, "couldn't set /chosen/bootargs\n");
@ -338,6 +329,13 @@ static int ppce500_load_device_tree(CPUPPCState *env,
qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
params->fixup_devtree(params, fdt);
if (toplevel_compat) {
qemu_devtree_setprop(fdt, "/", "compatible", toplevel_compat,
strlen(toplevel_compat) + 1);
}
done:
if (dumpdtb) {
/* Dump the dtb to a file and quit */
@ -418,12 +416,7 @@ static void ppce500_cpu_reset(void *opaque)
mmubooke_create_initial_mapping(env);
}
static void ppce500_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
void ppce500_init(PPCE500Params *params)
{
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
@ -444,8 +437,8 @@ static void ppce500_init(ram_addr_t ram_size,
CPUPPCState *firstenv = NULL;
/* Setup CPUs */
if (cpu_model == NULL) {
cpu_model = "e500v2_v30";
if (params->cpu_model == NULL) {
params->cpu_model = "e500v2_v30";
}
irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
@ -454,7 +447,7 @@ static void ppce500_init(ram_addr_t ram_size,
PowerPCCPU *cpu;
qemu_irq *input;
cpu = cpu_ppc_init(cpu_model);
cpu = cpu_ppc_init(params->cpu_model);
if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
@ -543,43 +536,45 @@ static void ppce500_init(ram_addr_t ram_size,
sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
/* Load kernel. */
if (kernel_filename) {
kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
if (params->kernel_filename) {
kernel_size = load_uimage(params->kernel_filename, &entry,
&loadaddr, NULL);
if (kernel_size < 0) {
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
&elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
kernel_size = load_elf(params->kernel_filename, NULL, NULL,
&elf_entry, &elf_lowaddr, NULL, 1,
ELF_MACHINE, 0);
entry = elf_entry;
loadaddr = elf_lowaddr;
}
/* XXX try again as binary */
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
params->kernel_filename);
exit(1);
}
}
/* Load initrd. */
if (initrd_filename) {
if (params->initrd_filename) {
initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
initrd_size = load_image_targphys(initrd_filename, initrd_base,
initrd_size = load_image_targphys(params->initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
initrd_filename);
params->initrd_filename);
exit(1);
}
}
/* If we're loading a kernel directly, we must load the device tree too. */
if (kernel_filename) {
if (params->kernel_filename) {
struct boot_info *boot_info;
int dt_size;
dt_base = (loadaddr + kernel_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
dt_size = ppce500_load_device_tree(env, dt_base, ram_size, initrd_base,
initrd_size, kernel_cmdline);
dt_size = ppce500_load_device_tree(env, params, dt_base, initrd_base,
initrd_size);
if (dt_size < 0) {
fprintf(stderr, "couldn't load device tree\n");
exit(1);
@ -595,17 +590,3 @@ static void ppce500_init(ram_addr_t ram_size,
kvmppc_init();
}
}
static QEMUMachine ppce500_machine = {
.name = "mpc8544ds",
.desc = "mpc8544ds",
.init = ppce500_init,
.max_cpus = 15,
};
static void ppce500_machine_init(void)
{
qemu_register_machine(&ppce500_machine);
}
machine_init(ppce500_machine_init);

21
hw/ppc/e500.h Normal file
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@ -0,0 +1,21 @@
#ifndef PPCE500_H
#define PPCE500_H
typedef struct PPCE500Params {
/* Standard QEMU machine init params */
ram_addr_t ram_size;
const char *boot_device;
const char *kernel_filename;
const char *kernel_cmdline;
const char *initrd_filename;
const char *cpu_model;
/* e500-specific params */
/* required -- must at least add toplevel board compatible */
void (*fixup_devtree)(struct PPCE500Params *params, void *fdt);
} PPCE500Params;
void ppce500_init(PPCE500Params *params);
#endif

61
hw/ppc/mpc8544ds.c Normal file
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@ -0,0 +1,61 @@
/*
* Support for the PPC e500-based mpc8544ds board
*
* Copyright 2012 Freescale Semiconductor, Inc.
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include "config.h"
#include "qemu-common.h"
#include "e500.h"
#include "../boards.h"
#include "device_tree.h"
static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
{
const char model[] = "MPC8544DS";
const char compatible[] = "MPC8544DS\0MPC85xxDS";
qemu_devtree_setprop(fdt, "/", "model", model, sizeof(model));
qemu_devtree_setprop(fdt, "/", "compatible", compatible,
sizeof(compatible));
}
static void mpc8544ds_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
PPCE500Params params = {
.ram_size = ram_size,
.boot_device = boot_device,
.kernel_filename = kernel_filename,
.kernel_cmdline = kernel_cmdline,
.initrd_filename = initrd_filename,
.cpu_model = cpu_model,
.fixup_devtree = mpc8544ds_fixup_devtree,
};
ppce500_init(&params);
}
static QEMUMachine ppce500_machine = {
.name = "mpc8544ds",
.desc = "mpc8544ds",
.init = mpc8544ds_init,
.max_cpus = 15,
};
static void ppce500_machine_init(void)
{
qemu_register_machine(&ppce500_machine);
}
machine_init(ppce500_machine_init);