hw/i386/pc_{piix, q35}: Eliminate local pci_bus/pci_host variables

There is no advantage in having these local variables which 1/ needlessly have
different identifiers in both machines and 2/ which are redundant to pcms->bus
which is almost as short.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-ID: <20240224135851.100361-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2024-02-24 14:58:48 +01:00 committed by Philippe Mathieu-Daudé
parent b54a9d46a0
commit e71dd86320
2 changed files with 13 additions and 17 deletions

View File

@ -108,7 +108,6 @@ static void pc_init1(MachineState *machine,
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *system_io = get_system_io();
Object *phb = NULL;
PCIBus *pci_bus = NULL;
ISABus *isa_bus;
Object *piix4_pm = NULL;
qemu_irq smi_irq;
@ -212,11 +211,10 @@ static void pc_init1(MachineState *machine,
&error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
pci_bus_map_irqs(pci_bus,
pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
pci_bus_map_irqs(pcms->pcibus,
xen_enabled() ? xen_pci_slot_get_pirq
: pc_pci_slot_get_pirq);
pcms->pcibus = pci_bus;
hole64_size = object_property_get_uint(phb,
PCI_HOST_PROP_PCI_HOLE64_SIZE,
@ -261,7 +259,7 @@ static void pc_init1(MachineState *machine,
for (i = 0; i < ISA_NUM_IRQS; i++) {
qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
}
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal);
if (xen_enabled()) {
pci_device_set_intx_routing_notifier(
@ -273,7 +271,7 @@ static void pc_init1(MachineState *machine,
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev,
XEN_IOAPIC_NUM_PIRQS);
}
@ -310,7 +308,7 @@ static void pc_init1(MachineState *machine,
x86_register_ferr_irq(x86ms->gsi[13]);
}
pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL);
assert(pcms->vmport != ON_OFF_AUTO__MAX);
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
@ -321,7 +319,7 @@ static void pc_init1(MachineState *machine,
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true,
0x4);
pc_nic_init(pcmc, isa_bus, pci_bus);
pc_nic_init(pcmc, isa_bus, pcms->pcibus);
#ifdef CONFIG_IDE_ISA
if (!pcmc->pci_enabled) {

View File

@ -123,7 +123,6 @@ static void pc_q35_init(MachineState *machine)
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
X86MachineState *x86ms = X86_MACHINE(machine);
Object *phb;
PCIBus *host_bus;
PCIDevice *lpc;
DeviceState *lpc_dev;
ISADevice *rtc_state;
@ -217,8 +216,7 @@ static void pc_q35_init(MachineState *machine)
sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
/* pci */
host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
pcms->pcibus = host_bus;
pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
/* irq lines */
gsi_state = pc_gsi_create(&x86ms->gsi, true);
@ -232,7 +230,7 @@ static void pc_q35_init(MachineState *machine)
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
pci_realize_and_unref(lpc, host_bus, &error_fatal);
pci_realize_and_unref(lpc, pcms->pcibus, &error_fatal);
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
@ -284,7 +282,7 @@ static void pc_q35_init(MachineState *machine)
AHCIPCIState *ich9;
/* ahci and SATA device, for q35 1 ahci controller is built-in */
pdev = pci_create_simple_multifunction(host_bus,
pdev = pci_create_simple_multifunction(pcms->pcibus,
PCI_DEVFN(ICH9_SATA1_DEV,
ICH9_SATA1_FUNC),
"ich9-ahci");
@ -298,14 +296,14 @@ static void pc_q35_init(MachineState *machine)
if (machine_usb(machine)) {
/* Should we create 6 UHCI according to ich9 spec? */
ehci_create_ich9_with_companions(host_bus, 0x1d);
ehci_create_ich9_with_companions(pcms->pcibus, 0x1d);
}
if (pcms->smbus_enabled) {
PCIDevice *smb;
/* TODO: Populate SPD eeprom data. */
smb = pci_create_simple_multifunction(host_bus,
smb = pci_create_simple_multifunction(pcms->pcibus,
PCI_DEVFN(ICH9_SMB_DEV,
ICH9_SMB_FUNC),
TYPE_ICH9_SMB_DEVICE);
@ -317,8 +315,8 @@ static void pc_q35_init(MachineState *machine)
pc_cmos_init(pcms, rtc_state);
/* the rest devices to which pci devfn is automatically assigned */
pc_vga_init(isa_bus, host_bus);
pc_nic_init(pcmc, isa_bus, host_bus);
pc_vga_init(isa_bus, pcms->pcibus);
pc_nic_init(pcmc, isa_bus, pcms->pcibus);
if (machine->nvdimms_state->is_enabled) {
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,