target-i386: simplify pte/vaddr calculation
They can moved to after the dirty bit processing, and unified between CR0.PG=1 and CR0.PG=0. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -527,7 +527,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
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hwaddr paddr;
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uint64_t rsvd_mask = PG_HI_RSVD_MASK;
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uint32_t page_offset;
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target_ulong vaddr, virt_addr;
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target_ulong vaddr;
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is_user = mmu_idx == MMU_USER_IDX;
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#if defined(DEBUG_MMU)
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@ -544,7 +544,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
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pte = (uint32_t)pte;
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}
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#endif
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virt_addr = addr & TARGET_PAGE_MASK;
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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page_size = 4096;
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goto do_mapping;
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@ -748,9 +747,6 @@ do_check_protect:
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}
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stl_phys_notdirty(cs->as, pte_addr, pte);
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}
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/* align to page_size */
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pte &= ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
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virt_addr = addr & ~(page_size - 1);
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/* the page can be put in the TLB */
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prot = PAGE_READ;
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@ -771,11 +767,14 @@ do_check_protect:
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do_mapping:
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pte = pte & env->a20_mask;
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/* align to page_size */
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pte &= PG_ADDRESS_MASK & ~(page_size - 1);
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/* Even if 4MB pages, we map only one 4KB page in the cache to
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avoid filling it too fast */
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page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1);
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paddr = (pte & TARGET_PAGE_MASK) + page_offset;
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vaddr = virt_addr + page_offset;
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vaddr = addr & TARGET_PAGE_MASK;
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page_offset = vaddr & (page_size - 1);
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paddr = pte + page_offset;
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tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);
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return 0;
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